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tegra124: set safe values for href_to_sync and vref_to_sync 

href_to_sync and vref_to_sync are chip specific settings. Currently
they are set to 1/2 of hfront_porch and vfront_porch respectively.
However, to support EDID (CL192730), per David Ung, the safe
values for both are 1 (the same settings as in kernel).

BUG=none
BRANCH=none
TEST=built and booted on nyan.

Original-Change-Id: Ifb8898e720a160ba044e2b526de2a4d17bc63672
Original-Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/193504
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Original-Commit-Queue: Hung-Te Lin <hungte@chromium.org>
Original-Tested-by: Hung-Te Lin <hungte@chromium.org>
(cherry picked from commit a7128a533ba6083ddfeeca3ba0828962cc2c8ab6)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I6954a5b49c798ebdffb20e3ebc9099cd17591b79
Reviewed-on: http://review.coreboot.org/7758
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Jimmy Zhang 2014-04-07 15:45:08 -07:00 committed by Marc Jones
parent 46e0975987
commit 846f344226
3 changed files with 6 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/mainboard/google/nyan/devicetree.cb
View File

@ -69,12 +69,12 @@ chip soc/nvidia/tegra124
# 1366x768 (0x45) 76.4MHz -HSync -VSync *current +preferred
# h: width 1366 start 1502 end 1532 total 1592
# v: height 768 start 776 end 788 total 800
register "href_to_sync" = "68"
register "href_to_sync" = "1"
register "hfront_porch" = "136"
register "hsync_width" = "30"
register "hback_porch" = "60"
register "vref_to_sync" = "4"
register "vref_to_sync" = "1"
register "vfront_porch" = "8"
register "vsync_width" = "12"
register "vback_porch" = "12"

4
src/mainboard/google/nyan_big/devicetree.cb
View File

@ -69,12 +69,12 @@ chip soc/nvidia/tegra124
# 1366x768 (0x45) 76.4MHz -HSync -VSync *current +preferred
# h: width 1366 start 1502 end 1532 total 1592
# v: height 768 start 776 end 788 total 800
register "href_to_sync" = "68"
register "href_to_sync" = "1"
register "hfront_porch" = "136"
register "hsync_width" = "30"
register "hback_porch" = "60"
register "vref_to_sync" = "4"
register "vref_to_sync" = "1"
register "vfront_porch" = "8"
register "vsync_width" = "12"
register "vback_porch" = "12"

4
src/mainboard/google/nyan_blaze/devicetree.cb
View File

@ -69,12 +69,12 @@ chip soc/nvidia/tegra124
# 1366x768 (0x45) 76.4MHz -HSync -VSync *current +preferred
# h: width 1366 start 1502 end 1532 total 1592
# v: height 768 start 776 end 788 total 800
register "href_to_sync" = "68"
register "href_to_sync" = "1"
register "hfront_porch" = "136"
register "hsync_width" = "30"
register "hback_porch" = "60"
register "vref_to_sync" = "4"
register "vref_to_sync" = "1"
register "vfront_porch" = "8"
register "vsync_width" = "12"
register "vback_porch" = "12"