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skylake: Leave SPI controller enabled 

Leave the SPI controller enabled upon boot block exit.

BRANCH=none
BUG=chrome-os-partner:44827
TEST=Build and run on kunimitsu

Change-Id: I5b10d7cc8d5d350282206abe6a945bab66f97ada
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: http://review.coreboot.org/11825
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Lee Leahy 2015-09-17 11:53:27 -07:00 committed by Aaron Durbin
parent f45eb062da
commit 8475f2d0c5
1 changed files with 0 additions and 5 deletions
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5
src/soc/intel/skylake/bootblock/cpu.c
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@ -120,11 +120,6 @@ static void set_pch_cpu_strap(u8 flex_ratio)
ssl = read32(spibar + SPIBAR_RESET_LOCK); ssl = read32(spibar + SPIBAR_RESET_LOCK);
ssl |= SPIBAR_RESET_LOCK_ENABLE; ssl |= SPIBAR_RESET_LOCK_ENABLE;
write32(spibar + SPIBAR_RESET_LOCK, ssl); write32(spibar + SPIBAR_RESET_LOCK, ssl);
/* Disable SPI Controller MMIO space */
pcireg = pci_read_config8(dev, PCI_COMMAND);
pcireg &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
pci_write_config8(dev, PCI_COMMAND, pcireg);
} }
static void set_flex_ratio_to_tdp_nominal(void) static void set_flex_ratio_to_tdp_nominal(void)