soc/amd/psp_verstage: Split up verstage_soc_init

Make psp verstage initialization more granular be splitting
verstage_soc_init into separate functions. Specifically, create
soc init functions for espi, i2c spi, and aoac.

BUG=b:200578885
BRANCH=None
TEST=Build and boot guybrush

Change-Id: I489889a0dfd4016aa4f2b53a2c6a7a1ea4459e60
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59318
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
This commit is contained in:
Rob Barnes 2021-11-15 12:56:34 -07:00 committed by Felix Held
parent 1a4b132413
commit 847a39fec7
3 changed files with 36 additions and 7 deletions

View File

@ -152,15 +152,29 @@ uint32_t verstage_soc_early_init(void)
return map_fch_devices(); return map_fch_devices();
} }
void verstage_soc_init(void) void verstage_soc_espi_init(void)
{ {
if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI)) if (!CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI))
return;
printk(BIOS_DEBUG, "Setting up espi\n");
espi_setup(); espi_setup();
}
enable_aoac_devices(); void verstage_soc_i2c_init(void)
{
printk(BIOS_DEBUG, "Setting up i2c\n"); printk(BIOS_DEBUG, "Setting up i2c\n");
i2c_soc_early_init(); i2c_soc_early_init();
printk(BIOS_DEBUG, "i2c setup\n"); }
void verstage_soc_aoac_init(void)
{
printk(BIOS_DEBUG, "Setting up aoac\n");
enable_aoac_devices();
}
void verstage_soc_spi_init(void)
{
printk(BIOS_DEBUG, "Setting up spi\n");
fch_spi_config_modes(); fch_spi_config_modes();
show_spi_speeds_and_modes(); show_spi_speeds_and_modes();
} }

View File

@ -49,7 +49,10 @@ void test_svc_calls(void);
uint32_t unmap_fch_devices(void); uint32_t unmap_fch_devices(void);
uint32_t verstage_soc_early_init(void); uint32_t verstage_soc_early_init(void);
void verstage_mainboard_espi_init(void); void verstage_mainboard_espi_init(void);
void verstage_soc_init(void); void verstage_soc_aoac_init(void);
void verstage_soc_espi_init(void);
void verstage_soc_i2c_init(void);
void verstage_soc_spi_init(void);
uintptr_t *map_spi_rom(void); uintptr_t *map_spi_rom(void);
uint32_t get_max_workbuf_size(uint32_t *size); uint32_t get_max_workbuf_size(uint32_t *size);

View File

@ -243,7 +243,19 @@ void Main(void)
svc_write_postcode(POSTCODE_LATE_INIT); svc_write_postcode(POSTCODE_LATE_INIT);
fch_io_enable_legacy_io(); fch_io_enable_legacy_io();
verstage_soc_init();
printk(BIOS_DEBUG, "calling verstage_soc_espi_init\n");
verstage_soc_espi_init();
printk(BIOS_DEBUG, "calling verstage_soc_aoac_init\n");
verstage_soc_aoac_init();
printk(BIOS_DEBUG, "calling verstage_soc_i2c_init\n");
verstage_soc_i2c_init();
printk(BIOS_DEBUG, "calling verstage_soc_spi_init\n");
verstage_soc_spi_init();
verstage_mainboard_init(); verstage_mainboard_init();
post_code(POSTCODE_VERSTAGE_MAIN); post_code(POSTCODE_VERSTAGE_MAIN);