mb/google/rex: Add EC smihandler
Add SMI handler implementation to manage power cycle, power state transition and Chrome EC events. BUG=b:224325352 TEST=util/abuild/abuild -p none -t google/rex -a -c max Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Change-Id: I10aab8257fce92aaf913a53c0c9fb6c1a4f5dea6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64623 Reviewed-by: Tarun Tuli <taruntuli@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -9,6 +9,8 @@ ramstage-y += mainboard.c
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ramstage-$(CONFIG_CHROMEOS) += chromeos.c
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ramstage-y += ec.c
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smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
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VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR))
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BASEBOARD_DIR:=$(call strip_quotes,$(CONFIG_BASEBOARD_DIR))
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@ -0,0 +1,29 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <cpu/x86/smm.h>
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#include <ec/google/chromeec/ec.h>
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#include <ec/google/chromeec/smm.h>
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#include <elog.h>
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#include <intelblocks/smihandler.h>
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#include <variant/ec.h>
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void mainboard_smi_sleep(u8 slp_typ)
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{
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chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS, MAINBOARD_EC_S5_WAKE_EVENTS);
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}
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int mainboard_smi_apmc(u8 apmc)
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{
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chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS);
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return 0;
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}
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void elog_gsmi_cb_mainboard_log_wake_source(void)
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{
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google_chromeec_log_events(MAINBOARD_EC_LOG_EVENTS | MAINBOARD_EC_S0IX_WAKE_EVENTS);
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}
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void mainboard_smi_espi_handler(void)
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{
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chromeec_smi_process_events();
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}
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