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mb/gigabyte: Use 'Device()' instead of 'Processor()' 

Processor() operator is deprecated, use Device() instead.

Change-Id: Ia27308ba17c6b5c836ada6278f7d26631e09c022
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36306
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Elyes HAOUAS 2019-10-24 15:20:23 +02:00 committed by Martin Roth
parent 6908dc8ea8
commit 8484a12a9c
6 changed files with 76 additions and 97 deletions
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18
src/mainboard/gigabyte/ma785gm/acpi/cpstate.asl
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@ -22,17 +22,25 @@
#include <arch/acpi.h> #include <arch/acpi.h>
DefinitionBlock ("DSDT.AML", "DSDT", 0x01, OEM_ID, ACPI_TABLE_CREATOR, 0x00010001) DefinitionBlock ("DSDT.AML", "DSDT", 0x01, OEM_ID, ACPI_TABLE_CREATOR, 0x00010001)
{ {
Scope (\_PR) { Scope (\_PR) {
Processor(CPU0,0,0x808,0x06) { Device (CPU0) {
Name (_HID, "ACPI0007")
Name (_UID, 0)
#include "cpstate.asl" #include "cpstate.asl"
} }
Processor(CPU1,1,0x0,0x0) { Device (CPU1) {
Name (_HID, "ACPI0007")
Name (_UID, 1)
#include "cpstate.asl" #include "cpstate.asl"
} }
Processor(CPU2,2,0x0,0x0) { Device (CPU2) {
Name (_HID, "ACPI0007")
Name (_UID, 2)
#include "cpstate.asl" #include "cpstate.asl"
} }
Processor(CPU3,3,0x0,0x0) { Device (CPU3) {
Name (_HID, "ACPI0007")
Name (_UID, 3)
#include "cpstate.asl" #include "cpstate.asl"
} }
} }

39
src/mainboard/gigabyte/ma785gm/dsdt.asl
View File

@ -58,39 +58,24 @@ DefinitionBlock (
* *
*/ */
Scope (\_PR) { /* define processor scope */ Scope (\_PR) { /* define processor scope */
Processor( Device (CPU0) {
CPU0, /* name space name */ Name (_HID, "ACPI0007")
0, /* Unique number for this processor */ Name (_UID, 0)
0x808, /* PBLK system I/O address !hardcoded! */
0x06 /* PBLKLEN for boot processor */
) {
#include "acpi/cpstate.asl" #include "acpi/cpstate.asl"
} }
Device (CPU1) {
Processor( Name (_HID, "ACPI0007")
CPU1, /* name space name */ Name (_UID, 1)
1, /* Unique number for this processor */
0x0000, /* PBLK system I/O address !hardcoded! */
0x00 /* PBLKLEN for boot processor */
) {
#include "acpi/cpstate.asl" #include "acpi/cpstate.asl"
} }
Device (CPU2) {
Processor( Name (_HID, "ACPI0007")
CPU2, /* name space name */ Name (_UID, 2)
2, /* Unique number for this processor */
0x0000, /* PBLK system I/O address !hardcoded! */
0x00 /* PBLKLEN for boot processor */
) {
#include "acpi/cpstate.asl" #include "acpi/cpstate.asl"
} }
Device (CPU3) {
Processor( Name (_HID, "ACPI0007")
CPU3, /* name space name */ Name (_UID, 3)
3, /* Unique number for this processor */
0x0000, /* PBLK system I/O address !hardcoded! */
0x00 /* PBLKLEN for boot processor */
) {
#include "acpi/cpstate.asl" #include "acpi/cpstate.asl"
} }
} /* End _PR scope */ } /* End _PR scope */

20
src/mainboard/gigabyte/ma785gmt/acpi/cpstate.asl
View File

@ -16,23 +16,31 @@
/* This file defines the processor and performance state capability /* This file defines the processor and performance state capability
* for each core in the system. It is included into the DSDT for each * for each core in the system. It is included into the DSDT for each
* core. It assumes that each core of the system has the same performance * core. It assumes that each core of the system has the same performance
* characteristics. * charateristics.
*/ */
/* /*
#include <arch/acpi.h> #include <arch/acpi.h>
DefinitionBlock ("DSDT.AML", "DSDT", 0x01, OEM_ID, ACPI_TABLE_CREATOR, 0x00010001) DefinitionBlock ("DSDT.AML", "DSDT", 0x01, OEM_ID, ACPI_TABLE_CREATOR, 0x00010001)
{ {
Scope (\_PR) { Scope (\_PR) {
Processor(CPU0,0,0x808,0x06) { Device (CPU0) {
Name (_HID, "ACPI0007")
Name (_UID, 0)
#include "cpstate.asl" #include "cpstate.asl"
} }
Processor(CPU1,1,0x0,0x0) { Device (CPU1) {
Name (_HID, "ACPI0007")
Name (_UID, 1)
#include "cpstate.asl" #include "cpstate.asl"
} }
Processor(CPU2,2,0x0,0x0) { Device (CPU2) {
Name (_HID, "ACPI0007")
Name (_UID, 2)
#include "cpstate.asl" #include "cpstate.asl"
} }
Processor(CPU3,3,0x0,0x0) { Device (CPU3) {
Name (_HID, "ACPI0007")
Name (_UID, 3)
#include "cpstate.asl" #include "cpstate.asl"
} }
} }

39
src/mainboard/gigabyte/ma785gmt/dsdt.asl
View File

@ -58,39 +58,24 @@ DefinitionBlock (
* *
*/ */
Scope (\_PR) { /* define processor scope */ Scope (\_PR) { /* define processor scope */
Processor( Device (CPU0) {
CPU0, /* name space name */ Name (_HID, "ACPI0007")
0, /* Unique number for this processor */ Name (_UID, 0)
0x808, /* PBLK system I/O address !hardcoded! */
0x06 /* PBLKLEN for boot processor */
) {
#include "acpi/cpstate.asl" #include "acpi/cpstate.asl"
} }
Device (CPU1) {
Processor( Name (_HID, "ACPI0007")
CPU1, /* name space name */ Name (_UID, 1)
1, /* Unique number for this processor */
0x0000, /* PBLK system I/O address !hardcoded! */
0x00 /* PBLKLEN for boot processor */
) {
#include "acpi/cpstate.asl" #include "acpi/cpstate.asl"
} }
Device (CPU2) {
Processor( Name (_HID, "ACPI0007")
CPU2, /* name space name */ Name (_UID, 2)
2, /* Unique number for this processor */
0x0000, /* PBLK system I/O address !hardcoded! */
0x00 /* PBLKLEN for boot processor */
) {
#include "acpi/cpstate.asl" #include "acpi/cpstate.asl"
} }
Device (CPU3) {
Processor( Name (_HID, "ACPI0007")
CPU3, /* name space name */ Name (_UID, 3)
3, /* Unique number for this processor */
0x0000, /* PBLK system I/O address !hardcoded! */
0x00 /* PBLKLEN for boot processor */
) {
#include "acpi/cpstate.asl" #include "acpi/cpstate.asl"
} }
} /* End _PR scope */ } /* End _PR scope */

18
src/mainboard/gigabyte/ma78gm/acpi/cpstate.asl
View File

@ -22,17 +22,25 @@
#include <arch/acpi.h> #include <arch/acpi.h>
DefinitionBlock ("DSDT.AML", "DSDT", 0x01, OEM_ID, ACPI_TABLE_CREATOR, 0x00010001) DefinitionBlock ("DSDT.AML", "DSDT", 0x01, OEM_ID, ACPI_TABLE_CREATOR, 0x00010001)
{ {
Scope (\_PR) { Scope (\_PR) {
Processor(CPU0,0,0x808,0x06) { Device (CPU0) {
Name (_HID, "ACPI0007")
Name (_UID, 0)
#include "cpstate.asl" #include "cpstate.asl"
} }
Processor(CPU1,1,0x0,0x0) { Device (CPU1) {
Name (_HID, "ACPI0007")
Name (_UID, 1)
#include "cpstate.asl" #include "cpstate.asl"
} }
Processor(CPU2,2,0x0,0x0) { Device (CPU2) {
Name (_HID, "ACPI0007")
Name (_UID, 2)
#include "cpstate.asl" #include "cpstate.asl"
} }
Processor(CPU3,3,0x0,0x0) { Device (CPU3) {
Name (_HID, "ACPI0007")
Name (_UID, 3)
#include "cpstate.asl" #include "cpstate.asl"
} }
} }

39
src/mainboard/gigabyte/ma78gm/dsdt.asl
View File

@ -58,39 +58,24 @@ DefinitionBlock (
* *
*/ */
Scope (\_PR) { /* define processor scope */ Scope (\_PR) { /* define processor scope */
Processor( Device (CPU0) {
CPU0, /* name space name */ Name (_HID, "ACPI0007")
0, /* Unique number for this processor */ Name (_UID, 0)
0x808, /* PBLK system I/O address !hardcoded! */
0x06 /* PBLKLEN for boot processor */
) {
#include "acpi/cpstate.asl" #include "acpi/cpstate.asl"
} }
Device (CPU1) {
Processor( Name (_HID, "ACPI0007")
CPU1, /* name space name */ Name (_UID, 1)
1, /* Unique number for this processor */
0x0000, /* PBLK system I/O address !hardcoded! */
0x00 /* PBLKLEN for boot processor */
) {
#include "acpi/cpstate.asl" #include "acpi/cpstate.asl"
} }
Device (CPU2) {
Processor( Name (_HID, "ACPI0007")
CPU2, /* name space name */ Name (_UID, 2)
2, /* Unique number for this processor */
0x0000, /* PBLK system I/O address !hardcoded! */
0x00 /* PBLKLEN for boot processor */
) {
#include "acpi/cpstate.asl" #include "acpi/cpstate.asl"
} }
Device (CPU3) {
Processor( Name (_HID, "ACPI0007")
CPU3, /* name space name */ Name (_UID, 3)
3, /* Unique number for this processor */
0x0000, /* PBLK system I/O address !hardcoded! */
0x00 /* PBLKLEN for boot processor */
) {
#include "acpi/cpstate.asl" #include "acpi/cpstate.asl"
} }
} /* End _PR scope */ } /* End _PR scope */