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mb/intel/dcp847ske: Drop useless MCHBAR writes 

There's no need to write the GDCRTRAININGRESULT registers after raminit.

Change-Id: If604920fe7a3bee96f72f8aff5e96f0e25548f18
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50534
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2021-02-11 13:18:45 +01:00
parent 927fa6d04c
commit 84ec70312e
1 changed files with 0 additions and 8 deletions
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8
src/mainboard/intel/dcp847ske/early_southbridge.c
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@ -9,14 +9,6 @@
#include "superio.h" #include "superio.h"
#include "thermal.h" #include "thermal.h"
void mainboard_late_rcba_config(void)
{
/* Set "mobile" bit in MCH (which makes sense layout-wise). */
/* Note sure if this has any effect at all though. */
MCHBAR32(0x0004) |= 0x00001000;
MCHBAR32(0x0104) |= 0x00001000;
}
static const u16 hwm_initvals[] = { static const u16 hwm_initvals[] = {
HWM_BANK(0), HWM_BANK(0),
HWM_INITVAL(0xae, 0x01), /* Enable PECI Agent0 */ HWM_INITVAL(0xae, 0x01), /* Enable PECI Agent0 */