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soc/intel/skylake: Prevent disabling of TCO 

In Skylake/Kabylake, if ACPI PM timer is disabled then TCO also gets
disabled & vice versa.

FSP default config for EnableTcoTimer is disabled, this caused ACPI PM
timer & TCO to be disabled by FSP even when config PmTimerDisable = 0.

Thus update FSPS UPD EnableTcoTimer in accordance to devicetree config
PmTimerDisable.

BUG=None
TEST= Build for Soraka with PmTimerDisable=0 & check if TCO caused
reboot after running shell command: cat >> /dev/watchdog0

Change-Id: Ia146761036c9dbaef3c02c9a7122ae3dcdef7bdd
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Reviewed-on: https://review.coreboot.org/29108
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
This commit is contained in:
Naresh G Solanki 2018-10-15 15:37:15 +05:30 committed by Patrick Georgi
parent 2653cdbe0c
commit 84fbc30e92
1 changed files with 1 additions and 0 deletions
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1
src/soc/intel/skylake/chip_fsp20.c
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@ -369,6 +369,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->SataMode = config->SataMode;
params->SataSpeedLimit = config->SataSpeedLimit;
params->SataPwrOptEnable = config->SataPwrOptEnable;
params->EnableTcoTimer = !config->PmTimerDisabled;
tconfig->PchLockDownGlobalSmi = config->LockDownConfigGlobalSmi;
tconfig->PchLockDownRtcLock = config->LockDownConfigRtcLock;