soc/intel/xeon_sp/Makefile.inc: Build EBG for SPR-SP
Intel SPR-SP chipset has EBG instead of LBG. Signed-off-by: Tim Chu <Tim.Chu@quantatw.com> Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com> Change-Id: I9429fe332bb5f01a41aa205c76ad9f0159f93eee Reviewed-on: https://review.coreboot.org/c/coreboot/+/71959 Reviewed-by: Jian-Ming Wang <jianmingW@supermicro.com> Reviewed-by: TimLiu-SMCI <timliu@supermicro.com.tw> Reviewed-by: Jonathan Zhang <jon.zhixiong.zhang@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -4,6 +4,7 @@ ifeq ($(CONFIG_XEON_SP_COMMON_BASE),y)
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subdirs-$(CONFIG_SOC_INTEL_SKYLAKE_SP) += skx lbg
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subdirs-$(CONFIG_SOC_INTEL_COOPERLAKE_SP) += cpx lbg
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subdirs-$(CONFIG_SOC_INTEL_SAPPHIRERAPIDS_SP) += spr ebg
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bootblock-y += bootblock.c spi.c lpc.c pch.c
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romstage-y += romstage.c reset.c util.c spi.c pmutil.c memmap.c
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