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Linux also needs the MMCONF area to be reserved either in E820 or 

as an ACPI motherboard resource or it will not enable MMCONFIG
and the extended pcie configuration area will be unaccessible:

This patch adds the IORESOURCE_RESERVE flag to the APIC and MMCONF
resource flags to do this.
I also added a new resource for the mapped bios rom area just below 4GB.
I'm not sure if the choice for the index parameter of new_resource()
is correct though.
Note that the bios rom decode is enabled in
src/southbridge/via/vt8237r/vt8237r_early_smbus.c
for the whole 4MB area (even though the comment says 1MB).

Ruik: I extended the flash range to 16MB (This is what VT8237S can decode)
Remove the MMCONFIG region reserve in the mainboard file (this patch makes it obsolete)

Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz> 




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6083 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Tobias Diedrich 2010-11-17 11:30:50 +00:00 committed by Rudolf Marek
parent e0c0a82954
commit 8520e01af7
3 changed files with 14 additions and 18 deletions
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12
src/mainboard/asus/m2v-mx_se/mainboard.c
View File

@ -30,18 +30,6 @@ uint64_t uma_memory_base, uma_memory_size;
int add_mainboard_resources(struct lb_memory *mem)
{
device_t dev;
dev = dev_find_device(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_K8M890CE_5, 0);
if (dev) {
struct resource *res =
find_resource(dev, K8T890_MMCONFIG_MBAR);
if (res)
lb_add_memory_range(mem, LB_MEM_RESERVED, res->base,
res->size);
}
#if (CONFIG_GFXUMA == 1)
lb_add_memory_range(mem, LB_MEM_RESERVED,
uma_memory_base, uma_memory_size);

4
src/southbridge/via/k8t890/k8t890_traf_ctrl.c
View File

@ -58,7 +58,7 @@ static void apic_mmconfig_read_resources(device_t dev)
res->limit = res->base + res->size - 1;
res->align = 8;
res->gran = 8;
res->flags = IORESOURCE_MEM | IORESOURCE_FIXED |
res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_RESERVE |
IORESOURCE_STORED | IORESOURCE_ASSIGNED;
/* Add an MMCONFIG resource. */
@ -67,7 +67,7 @@ static void apic_mmconfig_read_resources(device_t dev)
res->align = log2(res->size);
res->gran = log2(res->size);
res->limit = 0xffffffff; /* 4G */
res->flags = IORESOURCE_MEM;
res->flags = IORESOURCE_MEM | IORESOURCE_RESERVE;
}
static void traf_ctrl_enable_generic(struct device *dev)

16
src/southbridge/via/vt8237r/vt8237r_lpc.c
View File

@ -521,7 +521,7 @@ static void vt8237r_read_resources(device_t dev)
res->base = VT8237R_ACPI_IO_BASE;
res->size = 128;
res->limit = 0xffffUL;
res->flags = IORESOURCE_IO | IORESOURCE_FIXED |
res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_RESERVE |
IORESOURCE_STORED | IORESOURCE_ASSIGNED;
/* Fixed EISA ECLR I/O Regs */
@ -529,7 +529,7 @@ static void vt8237r_read_resources(device_t dev)
res->base = 0x4d0;
res->size = 2;
res->limit = 0xffffUL;
res->flags = IORESOURCE_IO | IORESOURCE_FIXED |
res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_RESERVE |
IORESOURCE_STORED | IORESOURCE_ASSIGNED;
/* Fixed System Management Bus I/O Resource */
@ -537,7 +537,7 @@ static void vt8237r_read_resources(device_t dev)
res->base = VT8237R_SMBUS_IO_BASE;
res->size = 16;
res->limit = 0xffffUL;
res->flags = IORESOURCE_IO | IORESOURCE_FIXED |
res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_RESERVE |
IORESOURCE_STORED | IORESOURCE_ASSIGNED;
/* Fixed APIC resource */
@ -547,7 +547,15 @@ static void vt8237r_read_resources(device_t dev)
res->limit = 0xffffffffUL;
res->align = 8;
res->gran = 8;
res->flags = IORESOURCE_MEM | IORESOURCE_FIXED |
res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_RESERVE |
IORESOURCE_STORED | IORESOURCE_ASSIGNED;
/* Fixed flashrom resource */
res = new_resource(dev, 4);
res->base = 0xff000000UL;
res->size = 0x01000000UL; /* 16MB */
res->limit = 0xffffffffUL;
res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_RESERVE |
IORESOURCE_STORED | IORESOURCE_ASSIGNED;
res = new_resource(dev, 1);