rush: ryu: remove mainboard_add_memory_ranges()
There's no need to add DMA ranges for these boards as that memory is allocated within dpethcharge now. Additionally, the DRAM_DMA_* Kconfig options were removed resulting in 0 values. BUG=None TEST=Built rush and ryu. BRANCH=None Change-Id: I597437960e4fddbf6d26f0b15ddeefc4557adc8b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: f26b503d759b2bac902e58e928d7c625c1a6c575 Original-Change-Id: I52bb8f760a56226c75611f7981570a44d56f242e Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/219710 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/9101 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -106,11 +106,3 @@ struct chip_operations mainboard_ops = {
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.name = "rush",
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.enable_dev = mainboard_enable,
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};
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void mainboard_add_memory_ranges(struct memranges *map)
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{
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/* Create non-cacheable region for DMA operations. */
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memranges_insert(map, CONFIG_DRAM_DMA_START, CONFIG_DRAM_DMA_SIZE,
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MA_MEM | MA_MEM_NC | MA_NS | MA_RW);
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}
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@ -78,10 +78,3 @@ struct chip_operations mainboard_ops = {
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.name = "rush_ryu",
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.enable_dev = mainboard_enable,
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};
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void mainboard_add_memory_ranges(struct memranges *map)
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{
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/* Create non-cacheable region for DMA operations. */
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memranges_insert(map, CONFIG_DRAM_DMA_START, CONFIG_DRAM_DMA_SIZE,
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MA_MEM | MA_MEM_NC | MA_NS | MA_RW);
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}
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