From 853c1afac21f3cfd19f487e95ba2b53cbd80e241 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Thu, 19 Sep 2019 22:07:33 +0200 Subject: [PATCH] mb/supermicro/x11ssh: remove unnecessary fsp setting CdClock MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit CdClock does not need to be set because the board does not use IGD. Change-Id: I6835ccdf80530f9efc6fdeb0363dcf9267f99d21 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/35477 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/mainboard/supermicro/x11ssh/ramstage.c | 1 - 1 file changed, 1 deletion(-) diff --git a/src/mainboard/supermicro/x11ssh/ramstage.c b/src/mainboard/supermicro/x11ssh/ramstage.c index 2672f73685..a37d2d2430 100644 --- a/src/mainboard/supermicro/x11ssh/ramstage.c +++ b/src/mainboard/supermicro/x11ssh/ramstage.c @@ -20,7 +20,6 @@ void mainboard_silicon_init_params(FSP_SIL_UPD *params) /* Configure pads prior to SiliconInit() in case there's any * dependencies during hardware initialization. */ gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); - params->CdClock = 3; /* This must be one, otherwise FSP crashes ... */ params->PchHdaVcType = 0x1;