From 853c6237cbdf7c2642fc51af204f1666a57add3d Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Thu, 9 Jul 2020 15:55:15 -0600 Subject: [PATCH] soc/amd/picasso: Map AOAC registers to enable i2c after S3 When entering S3, zork shuts down the i2c controllers to save power. On resume, we need to re-enable i2c before accessing them, so we need to map the AOAC registers in verstage. BUG=b:160834101 TEST=psp_verstage works after resume. Signed-off-by: Martin Roth Change-Id: Ia8aa4923898a50f2202b6ca8434cee61a5918e91 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43333 Reviewed-by: Aaron Durbin Reviewed-by: Raul Rangel Tested-by: build bot (Jenkins) --- src/soc/amd/picasso/psp_verstage/fch.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/soc/amd/picasso/psp_verstage/fch.c b/src/soc/amd/picasso/psp_verstage/fch.c index 9059c9e160..e01a684a34 100644 --- a/src/soc/amd/picasso/psp_verstage/fch.c +++ b/src/soc/amd/picasso/psp_verstage/fch.c @@ -63,6 +63,11 @@ void io_write8(u16 reg, u8 value) write8((void *)(io_bar + reg), value); } +static void aoac_set_bar(void *bar) +{ + acpimmio_aoac = bar; +} + static struct { const char *name; struct { @@ -79,6 +84,7 @@ static struct { {"eSPI", {FCH_IO_DEVICE_ESPI}, espi_set_bar}, {"I2C2", {FCH_IO_DEVICE_I2C, 2}, i2c2_set_bar}, {"I2C3", {FCH_IO_DEVICE_I2C, 3}, i2c3_set_bar}, + {"AOAC", {FCH_IO_DEVICE_AOAC}, aoac_set_bar}, }; uintptr_t *map_spi_rom(void)