GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/amd/common/lpc/lpc_util: use PM register mapping in ACPIMMIO region 

In all SoC lpc_early_init gets called either after a call to
enable_acpimmio_decode_pm04() or the ACPIMMIO mapping is already enabled
after reset on the SoC. This allows to use pm_read8 and pm_write8 that
use the ACPIMMIO mapping of the PM registers to set the PM_LPC_ENABLE
bit in the PM_LPC_GATING register instead of pm_io_read8 and
pm_io_write8 which won't work on Phoenix and Glinda due to the IO ports
used on older generations to access to the PM registers not being
implemented any more.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I8b31ec4e03a06796502c89e3c2cfaac2d41b0ed9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76461
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2023-07-14 19:49:05 +02:00 committed by Martin L Roth
parent 0c9549a058
commit 854491db63
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/soc/amd/common/block/lpc/lpc_util.c
View File

@ -347,9 +347,9 @@ static void lpc_enable_controller(void)
u8 byte;
/* Enable LPC controller */
byte = pm_io_read8(PM_LPC_GATING);
byte = pm_read8(PM_LPC_GATING);
byte |= PM_LPC_ENABLE;
pm_io_write8(PM_LPC_GATING, byte);
pm_write8(PM_LPC_GATING, byte);
}
void lpc_early_init(void)