mb/{system76,msi}: Enable PchHdaAudioLinkHdaEnable via devicetree

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Iae2dc0a934f0ea3ca59d8a811f1daeedb090a7bd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71717
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Kopeć <michal.kopec@3mdeb.com>
This commit is contained in:
Sean Rhodes 2023-01-06 11:20:30 +00:00 committed by Felix Held
parent d45402a55a
commit 854bd492fc
5 changed files with 2 additions and 3 deletions

View file

@ -261,6 +261,7 @@ chip soc/intel/alderlake
device ref p2sb on end
device ref hda on
subsystemid 0x1462 0x9d25
register "pch_hda_audio_link_hda_enable" = "1"
register "pch_hda_dsp_enable" = "0"
register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T"
register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ"

View file

@ -57,7 +57,6 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
memupd->FspmConfig.DmiMaxLinkSpeed = 4; // Gen4 speed, undocumented
memupd->FspmConfig.SkipExtGfxScan = 0;
memupd->FspmConfig.PchHdaAudioLinkHdaEnable = 1;
memupd->FspmConfig.PchHdaSdiEnable[0] = 1;
/*

View file

@ -84,6 +84,7 @@ chip soc/intel/alderlake
end
device ref p2sb on end
device ref hda on
register "pch_hda_audio_link_hda_enable" = "1"
register "pch_hda_idisp_codec_enable" = "1"
register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ"
register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T"

View file

@ -17,7 +17,6 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
};
const bool half_populated = false;
mupd->FspmConfig.PchHdaAudioLinkHdaEnable = 1;
mupd->FspmConfig.DmiMaxLinkSpeed = 4;
mupd->FspmConfig.GpioOverride = 0;

View file

@ -17,7 +17,6 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
};
const bool half_populated = false;
mupd->FspmConfig.PchHdaAudioLinkHdaEnable = 1;
mupd->FspmConfig.DmiMaxLinkSpeed = 4;
mupd->FspmConfig.GpioOverride = 0;