GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

amdfam10: Declare empty activate_spd_rom() stub 

Change-Id: I1d0940a08f7ae5901b812618a6859c4297274591
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33994
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Kyösti Mälkki 2019-07-03 06:08:13 +03:00
parent 6044be7f9e
commit 8560db6116
25 changed files with 12 additions and 55 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/mainboard/advansus/a785e-i/romstage.c
View File

@ -45,13 +45,9 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;
void activate_spd_rom(const struct mem_controller *ctrl)
{
}
int spd_read_byte(u32 device, u32 address)
{

4
src/mainboard/amd/bimini_fam10/romstage.c
View File

@ -41,13 +41,9 @@
#include "cpu/amd/quadcore/quadcore.c"
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;
void activate_spd_rom(const struct mem_controller *ctrl)
{
}
int spd_read_byte(u32 device, u32 address)
{

2
src/mainboard/amd/mahogany_fam10/romstage.c
View File

@ -45,11 +45,9 @@
#include "cpu/amd/quadcore/quadcore.c"
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;
void activate_spd_rom(const struct mem_controller *ctrl) { }
int spd_read_byte(u32 device, u32 address)
{

1
src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
View File

@ -41,7 +41,6 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;

2
src/mainboard/amd/tilapia_fam10/romstage.c
View File

@ -43,11 +43,9 @@
#define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1)
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;
void activate_spd_rom(const struct mem_controller *ctrl) { }
int spd_read_byte(u32 device, u32 address)
{

1
src/mainboard/asus/kcma-d8/romstage.c
View File

@ -50,7 +50,6 @@
#define SERIAL_0_DEV PNP_DEV(0x2e, W83667HG_A_SP1)
#define SERIAL_1_DEV PNP_DEV(0x2e, W83667HG_A_SP2)
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;

4
src/mainboard/asus/kfsn4-dre/romstage.c
View File

@ -53,7 +53,6 @@
#define GPIO3_DEV PNP_DEV(0x2e, W83627THG_GPIO3)
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;
@ -170,7 +169,8 @@ static const uint8_t spd_addr[] = {
RC01, DIMM0, DIMM2, DIMM4, DIMM6, DIMM1, DIMM3, DIMM5, DIMM7,
};
void activate_spd_rom(const struct mem_controller *ctrl) {
void activate_spd_rom(const struct mem_controller *ctrl)
{
printk(BIOS_DEBUG, "activate_spd_rom() for node %02x\n", ctrl->node_id);
if (ctrl->node_id == 0) {
printk(BIOS_DEBUG, "enable_spd_node0()\n");

4
src/mainboard/asus/kgpe-d16/romstage.c
View File

@ -51,7 +51,6 @@
#define SERIAL_0_DEV PNP_DEV(0x2e, W83667HG_A_SP1)
#define SERIAL_1_DEV PNP_DEV(0x2e, W83667HG_A_SP2)
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;
@ -179,7 +178,8 @@ static const uint8_t spd_addr_fam10[] = {
RC01, DIMM0, DIMM1, 0, 0, DIMM2, DIMM3, 0, 0,
};
void activate_spd_rom(const struct mem_controller *ctrl) {
void activate_spd_rom(const struct mem_controller *ctrl)
{
struct sys_info *sysinfo = &sysinfo_car;
printk(BIOS_DEBUG, "activate_spd_rom() for node %02x\n", ctrl->node_id);
if (ctrl->node_id == 0) {

2
src/mainboard/asus/m4a78-em/romstage.c
View File

@ -46,11 +46,9 @@
#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
#define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;
void activate_spd_rom(const struct mem_controller *ctrl) { }
int spd_read_byte(u32 device, u32 address)
{

2
src/mainboard/asus/m4a785-m/romstage.c
View File

@ -46,11 +46,9 @@
#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
#define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;
void activate_spd_rom(const struct mem_controller *ctrl) { }
int spd_read_byte(u32 device, u32 address)
{

4
src/mainboard/asus/m5a88-v/romstage.c
View File

@ -46,13 +46,9 @@
#define SERIAL_DEV PNP_DEV(0x4e, IT8721F_SP1)
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;
void activate_spd_rom(const struct mem_controller *ctrl)
{
}
int spd_read_byte(u32 device, u32 address)
{

4
src/mainboard/avalue/eax-785e/romstage.c
View File

@ -45,13 +45,9 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
#define CLK_DEV PNP_DEV(0x2e, W83627HF_SP1)
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;
void activate_spd_rom(const struct mem_controller *ctrl)
{
}
int spd_read_byte(u32 device, u32 address)
{

2
src/mainboard/gigabyte/ma785gm/romstage.c
View File

@ -46,11 +46,9 @@
#define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1)
#define GPIO_DEV PNP_DEV(0x2e, IT8718F_GPIO)
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;
void activate_spd_rom(const struct mem_controller *ctrl) { }
int spd_read_byte(u32 device, u32 address)
{

2
src/mainboard/gigabyte/ma785gmt/romstage.c
View File

@ -46,11 +46,9 @@
#define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1)
#define GPIO_DEV PNP_DEV(0x2e, IT8718F_GPIO)
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;
void activate_spd_rom(const struct mem_controller *ctrl) { }
int spd_read_byte(u32 device, u32 address)
{

2
src/mainboard/gigabyte/ma78gm/romstage.c
View File

@ -46,11 +46,9 @@
#define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1)
#define GPIO_DEV PNP_DEV(0x2e, IT8718F_GPIO)
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;
void activate_spd_rom(const struct mem_controller *ctrl) { }
int spd_read_byte(u32 device, u32 address)
{

3
src/mainboard/hp/dl165_g6_fam10/romstage.c
View File

@ -52,11 +52,10 @@
#define SERIAL_DEV PNP_DEV(0x2e, PILOT_SP1)
#define RTC_DEV PNP_DEV(0x4e, PC87417_RTC)
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;
inline void activate_spd_rom(const struct mem_controller *ctrl)
void activate_spd_rom(const struct mem_controller *ctrl)
{
u8 val;
outb(0x3d, 0x0cd6);

2
src/mainboard/iei/kino-780am2-fam10/romstage.c
View File

@ -45,11 +45,9 @@
#define SERIAL_DEV PNP_DEV(0x2e, F71859_SP1)
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;
void activate_spd_rom(const struct mem_controller *ctrl) { }
int spd_read_byte(u32 device, u32 address)
{

2
src/mainboard/jetway/pa78vm5/romstage.c
View File

@ -50,11 +50,9 @@
#define SERIAL_DEV PNP_DEV(0x2e, F71863FG_SP1)
#endif
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;
void activate_spd_rom(const struct mem_controller *ctrl) { }
int spd_read_byte(u32 device, u32 address)
{

2
src/mainboard/msi/ms9652_fam10/romstage.c
View File

@ -44,11 +44,9 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;
void activate_spd_rom(const struct mem_controller *ctrl) { }
inline int spd_read_byte(unsigned int device, unsigned int address)
{

2
src/mainboard/supermicro/h8dmr_fam10/romstage.c
View File

@ -47,11 +47,9 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
#define SUPERIO_DEV PNP_DEV(0x2e, 0)
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;
void activate_spd_rom(const struct mem_controller *ctrl) { }
inline int spd_read_byte(unsigned int device, unsigned int address)
{

3
src/mainboard/supermicro/h8qme_fam10/romstage.c
View File

@ -50,11 +50,10 @@
#define SMBUS_SWITCH1 0x70
#define SMBUS_SWITCH2 0x72
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;
inline void activate_spd_rom(const struct mem_controller *ctrl)
void activate_spd_rom(const struct mem_controller *ctrl)
{
smbus_send_byte(SMBUS_SWITCH1, 5 & 0x0f);
smbus_send_byte(SMBUS_SWITCH2, (5 >> 4) & 0x0f);

4
src/mainboard/supermicro/h8scm_fam10/romstage.c
View File

@ -42,13 +42,9 @@
#include "cpu/amd/quadcore/quadcore.c"
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;
void activate_spd_rom(const struct mem_controller *ctrl)
{
}
int spd_read_byte(u32 device, u32 address)
{

2
src/mainboard/tyan/s2912_fam10/romstage.c
View File

@ -43,11 +43,9 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned int device, unsigned int address);
extern struct sys_info sysinfo_car;
void activate_spd_rom(const struct mem_controller *ctrl) { }
inline int spd_read_byte(unsigned int device, unsigned int address)
{

2
src/northbridge/amd/amdfam10/raminit.h
View File

@ -24,6 +24,8 @@ struct sys_info;
struct DCTStatStruc;
struct MCTStatStruc;
void activate_spd_rom(const struct mem_controller *ctrl);
int mctRead_SPD(u32 smaddr, u32 reg);
void mctSMBhub_Init(u32 node);
void mctGet_DIMMAddr(struct DCTStatStruc *pDCTstat, u32 node);

5
src/northbridge/amd/amdfam10/raminit_amdmct.c
View File

@ -32,9 +32,12 @@
struct sys_info sysinfo_car CAR_GLOBAL;
struct mem_controller;
extern void activate_spd_rom(const struct mem_controller *ctrl);
extern int spd_read_byte(unsigned int device, unsigned int address);
void __weak activate_spd_rom(const struct mem_controller *ctrl)
{
}
void fam15h_switch_dct(uint32_t dev, uint8_t dct)
{
uint32_t dword;