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soc/intel/{xeon-sp,icl,tgl,jsl,ehl}: add NMI_{EN,STS} registers 

Add NMI_EN and NMI_STS registers, so NMI interrupts can be used.

References:
- XEON-SP: Intel doc# 633935-005 and 547817 rev1.5
- ICL-LP:  Intel doc# 341081-002
- TGL-LP:  Intel doc# 631120-001
- TGL-H:   Intel doc# 636174-002
- JSL:     Intel doc# 634545-001
- EHL:     Intel doc# 636722-002

Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Change-Id: I2621f4495dfd4f95f9774d9081e44c604de830a1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48102
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Lance Zhao
This commit is contained in:
Michael Niewöhner 2020-11-23 22:02:20 +01:00 committed by Patrick Georgi
parent 74da5f1e74
commit 85610d8d86
12 changed files with 62 additions and 0 deletions
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10
src/soc/intel/elkhartlake/gpio.c
View File

@ -83,6 +83,8 @@ static const struct pad_community ehl_communities[TOTAL_GPIO_COMM] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_BTG",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -103,6 +105,8 @@ static const struct pad_community ehl_communities[TOTAL_GPIO_COMM] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_VHDU",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -143,6 +147,8 @@ static const struct pad_community ehl_communities[TOTAL_GPIO_COMM] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_SA",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -163,6 +169,8 @@ static const struct pad_community ehl_communities[TOTAL_GPIO_COMM] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_CFE",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -183,6 +191,8 @@ static const struct pad_community ehl_communities[TOTAL_GPIO_COMM] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_RR",
.acpi_path = "\\_SB.PCI0.GPIO",

2
src/soc/intel/elkhartlake/include/soc/gpio_defs.h
View File

@ -331,6 +331,8 @@
#define GPI_INT_EN_0 0x120
#define GPI_SMI_STS_0 0x180
#define GPI_SMI_EN_0 0x1a0
#define GPI_NMI_STS_0 0x1c0
#define GPI_NMI_EN_0 0x1e0
#define PAD_CFG_BASE 0x700
#endif

10
src/soc/intel/icelake/gpio.c
View File

@ -74,6 +74,8 @@ static const struct pad_community icl_communities[TOTAL_GPIO_COMM] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_GBA",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -94,6 +96,8 @@ static const struct pad_community icl_communities[TOTAL_GPIO_COMM] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_HDF",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -114,6 +118,8 @@ static const struct pad_community icl_communities[TOTAL_GPIO_COMM] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPD",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -134,6 +140,8 @@ static const struct pad_community icl_communities[TOTAL_GPIO_COMM] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_CE",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -154,6 +162,8 @@ static const struct pad_community icl_communities[TOTAL_GPIO_COMM] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_RS",
.acpi_path = "\\_SB.PCI0.GPIO",

2
src/soc/intel/icelake/include/soc/gpio_defs.h
View File

@ -255,6 +255,8 @@
#define GPI_INT_EN_0 0x110
#define GPI_SMI_STS_0 0x180
#define GPI_SMI_EN_0 0x1A0
#define GPI_NMI_STS_0 0x1b0
#define GPI_NMI_EN_0 0x1d0
#define PAD_CFG_BASE 0x600
#endif

8
src/soc/intel/jasperlake/gpio.c
View File

@ -76,6 +76,8 @@ static const struct pad_community jsl_communities[TOTAL_GPIO_COMM] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_FBASR",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -96,6 +98,8 @@ static const struct pad_community jsl_communities[TOTAL_GPIO_COMM] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_HDC",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -136,6 +140,8 @@ static const struct pad_community jsl_communities[TOTAL_GPIO_COMM] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_E",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -156,6 +162,8 @@ static const struct pad_community jsl_communities[TOTAL_GPIO_COMM] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_G",
.acpi_path = "\\_SB.PCI0.GPIO",

2
src/soc/intel/jasperlake/include/soc/gpio_defs.h
View File

@ -254,6 +254,8 @@
#define GPI_INT_EN_0 0x120
#define GPI_SMI_STS_0 0x180
#define GPI_SMI_EN_0 0x1a0
#define GPI_NMI_STS_0 0x1c0
#define GPI_NMI_EN_0 0x1e0
#define PAD_CFG_BASE 0x600
#define PAD_CFG_LOCK 0x80

10
src/soc/intel/tigerlake/gpio.c
View File

@ -99,6 +99,8 @@ static const struct pad_community tgl_communities[] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_BTA",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -122,6 +124,8 @@ static const struct pad_community tgl_communities[] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_SDHU",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -144,6 +148,8 @@ static const struct pad_community tgl_communities[] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPD",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -164,6 +170,8 @@ static const struct pad_community tgl_communities[] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_FCE",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -187,6 +195,8 @@ static const struct pad_community tgl_communities[] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_CPU_VBPIO",
.acpi_path = "\\_SB.PCI0.GPIO",

6
src/soc/intel/tigerlake/gpio_pch_h.c
View File

@ -84,6 +84,8 @@ static const struct pad_community tgl_communities[] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_ARB",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -103,6 +105,8 @@ static const struct pad_community tgl_communities[] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_DCSG",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -141,6 +145,8 @@ static const struct pad_community tgl_communities[] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPP_EF",
.acpi_path = "\\_SB.PCI0.GPIO",

2
src/soc/intel/tigerlake/include/soc/gpio_defs.h
View File

@ -292,6 +292,8 @@
#define GPI_INT_EN_0 0x110
#define GPI_SMI_STS_0 0x180
#define GPI_SMI_EN_0 0x1A0
#define GPI_NMI_STS_0 0x1c0
#define GPI_NMI_EN_0 0x1e0
#define PAD_CFG_BASE 0x700
#endif

2
src/soc/intel/tigerlake/include/soc/gpio_defs_pch_h.h
View File

@ -310,6 +310,8 @@
#define GPI_INT_EN_0 0x120
#define GPI_SMI_STS_0 0x180
#define GPI_SMI_EN_0 0x1A0
#define GPI_NMI_STS_0 0x1c0
#define GPI_NMI_EN_0 0x1e0
#define PAD_CFG_BASE 0x600
#endif

6
src/soc/intel/xeon_sp/gpio.c
View File

@ -62,6 +62,8 @@ static const struct pad_community lewisburg_gpio_communities[] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPIO_COM0",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -81,6 +83,8 @@ static const struct pad_community lewisburg_gpio_communities[] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPIO_COM1",
.acpi_path = "\\_SB.PCI0.GPIO",
@ -100,6 +104,8 @@ static const struct pad_community lewisburg_gpio_communities[] = {
.gpi_int_en_reg_0 = GPI_INT_EN_0,
.gpi_smi_sts_reg_0 = GPI_SMI_STS_0,
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.gpi_nmi_sts_reg_0 = GPI_NMI_STS_0,
.gpi_nmi_en_reg_0 = GPI_NMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPIO_COM3",
.acpi_path = "\\_SB.PCI0.GPIO",

2
src/soc/intel/xeon_sp/include/soc/lewisburg_pch_gpio_defs.h
View File

@ -662,5 +662,7 @@
#define GPI_INT_EN_0 0x120
#define GPI_SMI_STS_0 0x180
#define GPI_SMI_EN_0 0x1a0
#define GPI_NMI_STS_0 0x160
#define GPI_NMI_EN_0 0x170
#endif /* LEWISBURG_GPIO_DEFS_H */