arm: Move exception_init() close to console_init()

This patch adds stub implementations of exception_init() to all archs
so that it can be called from src/lib/hardwaremain.c. It also moves/adds
all other invocations of exception_init() (which needs to be rerun in
every stage) close to console_init(), in the hopes that it will be less
likely overlooked when creating future boards. Also added (an
ineffective) one to the armv4 bootblock implementations for consistency
and in case we want to implement it later.

Change-Id: Iecad10172d25f6c1fc54b0fec8165d7ef60e3414
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/176764
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
(cherry picked from commit 2960623f4a59d841a13793ee906db8d1b1c16c5d)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6884
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)

src/arch/arm/armv4/bootblock_simple.c

@@ -19,6 +19,7 @@
  * MA 02110-1301 USA
  */
 
+#include <arch/exception.h>
 #include <arch/hlt.h>
 #include <arch/stages.h>
 #include <bootblock_common.h>
@@ -33,8 +34,10 @@ void main(void)
 	bootblock_cpu_init();
 	bootblock_mainboard_init();
 
-	if (CONFIG_BOOTBLOCK_CONSOLE)
+	if (CONFIG_BOOTBLOCK_CONSOLE) {
 		console_init();
+		exception_init();
+	}
 
 	entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, stage_name);
 

src/arch/arm/armv7/Makefile.inc

@@ -34,6 +34,8 @@ bootblock-$(CONFIG_BOOTBLOCK_SIMPLE) += bootblock_simple.c
 endif
 
 bootblock-y += cache.c
+bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += exception.c
+bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += exception_asm.S
 bootblock-y += mmu.c
 
 CFLAGS_bootblock += $(armv7_flags)

src/arch/arm/armv7/bootblock_simple.c

@@ -20,6 +20,7 @@
  */
 
 #include <arch/cache.h>
+#include <arch/exception.h>
 #include <arch/hlt.h>
 #include <arch/stages.h>
 #include <bootblock_common.h>
@@ -54,6 +55,7 @@ void main(void)
 
 #if CONFIG_BOOTBLOCK_CONSOLE
 	console_init();
+	exception_init();
 #endif
 
 	entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, stage_name);

src/arch/arm/include/armv4/arch/exception.h

@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2013 Google Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _ARCH_EXCEPTION_H
+#define _ARCH_EXCEPTION_H
+
+static void exception_init(void) { /* not implemented */ }
+
+#endif

src/arch/x86/include/arch/exception.h

@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2013 Google Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _ARCH_EXCEPTION_H
+#define _ARCH_EXCEPTION_H
+
+static void exception_init(void) { /* not implemented */ }
+
+#endif

src/lib/hardwaremain.c

@@ -22,6 +22,7 @@
  * C Bootstrap code for the coreboot
  */
 
+#include <arch/exception.h>
 #include <bootstate.h>
 #include <console/console.h>
 #include <console/post_codes.h>
@@ -469,6 +470,7 @@ void main(void)
 	acpi_is_wakeup();
 #endif
 
+	exception_init();
 	threads_initialize();
 
 	/* Schedule the static boot state entries. */

src/mainboard/google/nyan/romstage.c

@@ -95,6 +95,7 @@ void main(void)
 	configure_l2actlr();
 
 	console_init();
+	exception_init();
 
 	mmu_init();
 	mmu_config_range(0, DRAM_START, DCACHE_OFF);
@@ -106,8 +107,6 @@ void main(void)
 	dcache_invalidate_all();
 	dcache_mmu_enable();
 
-	exception_init();
-
 	/* For quality of the user experience, it's important to get
 	 * the video going ASAP. Because there are long delays in some
 	 * of the powerup steps, we do some very early setup here in

src/mainboard/google/pit/mainboard.c

@@ -27,7 +27,6 @@
 #include <vbe.h>
 #include <boot/coreboot_tables.h>
 #include <arch/cache.h>
-#include <arch/exception.h>
 #include <soc/samsung/exynos5420/tmu.h>
 #include <soc/samsung/exynos5420/clk.h>
 #include <soc/samsung/exynos5420/cpu.h>
@@ -472,10 +471,6 @@ static void mainboard_enable(device_t dev)
 	mmu_config_range(DMA_START >> 20, DMA_SIZE >> 20, DCACHE_OFF);
 	tlb_invalidate_all();
 
-	/* this is going to move, but we must have it now and we're
-	 * not sure where */
-	exception_init();
-
 	const unsigned epll_hz = 192000000;
 	const unsigned sample_rate = 48000;
 	const unsigned lr_frame_size = 256;

src/mainboard/google/pit/romstage.c

@@ -25,6 +25,7 @@
 #include <cbmem.h>
 
 #include <arch/cache.h>
+#include <arch/exception.h>
 #include <soc/samsung/exynos5420/i2c.h>
 #include <soc/samsung/exynos5420/clk.h>
 #include <soc/samsung/exynos5420/cpu.h>
@@ -242,6 +243,7 @@ void main(void)
 
 	exynos_pinmux_uart3();
 	console_init();
+	exception_init();
 
 	if (power_init_failed)
 		die("Failed to intialize power.\n");

src/mainboard/google/snow/mainboard.c

@@ -27,7 +27,6 @@
 #include <vbe.h>
 #include <boot/coreboot_tables.h>
 #include <arch/cache.h>
-#include <arch/exception.h>
 #include <soc/samsung/exynos5250/tmu.h>
 #include <soc/samsung/exynos5250/clk.h>
 #include <soc/samsung/exynos5250/gpio.h>
@@ -338,10 +337,6 @@ static void mainboard_enable(device_t dev)
 	dcache_invalidate_all();
 	dcache_mmu_enable();
 
-	/* this is going to move, but we must have it now and we're
-	 * not sure where */
-	exception_init();
-
 	const unsigned epll_hz = 192000000;
 	const unsigned sample_rate = 48000;
 	const unsigned lr_frame_size = 256;

src/mainboard/google/snow/romstage.c

@@ -24,6 +24,7 @@
 #include <cbmem.h>
 
 #include <arch/cache.h>
+#include <arch/exception.h>
 #include <soc/samsung/exynos5250/i2c.h>
 #include <soc/samsung/exynos5250/clk.h>
 #include <soc/samsung/exynos5250/cpu.h>
@@ -151,6 +152,7 @@ void main(void)
 	mem = setup_clock();
 
 	console_init();
+	exception_init();
 
 	setup_power(is_resume);
 	setup_memory(mem, is_resume);

src/soc/nvidia/tegra124/bootblock.c

@@ -17,6 +17,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
+#include <arch/exception.h>
 #include <arch/hlt.h>
 #include <bootblock_common.h>
 #include <cbfs.h>
@@ -47,8 +48,10 @@ void main(void)
 	pinmux_set_config(PINMUX_UART2_RTS_N_INDEX,
 			  PINMUX_UART2_RTS_N_FUNC_UB3);
 
-	if (CONFIG_BOOTBLOCK_CONSOLE)
+	if (CONFIG_BOOTBLOCK_CONSOLE) {
 		console_init();
+		exception_init();
+	}
 
 	clock_init();