mb/google/dedede/var/kracko: Update LTE USB port configuration

Update LTE USB port configuration at run-time after probing FW_CONFIG.
By default the concerned USB port takes the Type-A port configuration.

BUG=b:178092096
BRANCH=dedede
TEST=Build and boot to OS to check LTE by modem status

Change-Id: If12cc29ddda6d5c32c0bda840a3680e7bf932f89
Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54671
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Tony Huang 2021-05-19 16:59:17 +08:00 committed by Patrick Georgi
parent ceca5dedbc
commit 856b579fe5
7 changed files with 79 additions and 54 deletions

View File

@ -3,5 +3,6 @@ bootblock-y += gpio.c
romstage-y += memory.c
ramstage-y += gpio.c
ramstage-y += ramstage.c
smm-y += gpio.c

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@ -5,6 +5,7 @@
#include <soc/gpio.h>
#include <stdint.h>
#include <acpi/acpi_device.h>
/* The next set of functions return the gpio table and fill in the number of
* entries for each table. */
@ -42,4 +43,6 @@ void variant_smi_sleep(u8 slp_typ);
/* Modify devictree settings during ramstage. */
void variant_devtree_update(void);
/* Modify LTE devictree settings during ramstage. */
void update_lte_device(struct acpi_gpio *lte_reset_gpio, struct acpi_gpio *lte_enable_gpio);
#endif /*__BASEBOARD_VARIANTS_H__ */

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@ -0,0 +1,48 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <acpi/acpi_device.h>
#include <baseboard/variants.h>
#include <console/console.h>
#include <drivers/usb/acpi/chip.h>
#include <fw_config.h>
#include <gpio.h>
#include <soc/pci_devs.h>
#define LTE_USB_PORT_ID 3
#define LTE_USB_PORT_TYPE 2
void update_lte_device(struct acpi_gpio *lte_reset_gpio, struct acpi_gpio *lte_enable_gpio)
{
struct device *xhci, *hub = NULL, *port = NULL;
struct drivers_usb_acpi_config *config;
xhci = pcidev_path_on_root(PCH_DEVFN_XHCI);
if (!xhci) {
printk(BIOS_ERR, "%s: Could not locate XHCI device in DT\n", __func__);
return;
}
while ((hub = dev_bus_each_child(xhci->link_list, hub)) != NULL) {
while ((port = dev_bus_each_child(hub->link_list, port)) != NULL) {
if (!port->chip_info || port->path.usb.port_id != LTE_USB_PORT_ID)
continue;
if (fw_config_probe(FW_CONFIG(DB_PORTS, DB_PORTS_LTE_HDMI)) ||
fw_config_probe(FW_CONFIG(DB_PORTS, DB_PORTS_1C_LTE)) ||
fw_config_probe(FW_CONFIG(DB_PORTS, DB_PORTS_1A_HDMI_LTE))) {
config = port->chip_info;
config->type = UPC_TYPE_INTERNAL;
if (port->path.usb.port_type == LTE_USB_PORT_TYPE) {
config->has_power_resource = 1;
memcpy(&config->reset_gpio, &lte_reset_gpio,
sizeof(config->reset_gpio));
config->reset_off_delay_ms = 20;
memcpy(&config->enable_gpio, &lte_enable_gpio,
sizeof(config->enable_gpio));
config->enable_delay_ms = 20;
}
}
}
}
}

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@ -1,5 +1,6 @@
## SPDX-License-Identifier: GPL-2.0-or-later
ramstage-y += gpio.c
ramstage-y += ramstage.c
smm-y += variant.c

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@ -63,14 +63,13 @@ chip soc/intel/jasperlake
chip drivers/usb/acpi
device usb 0.0 on
chip drivers/usb/acpi
register "desc" = ""LTE""
register "type" = "UPC_TYPE_INTERNAL"
register "has_power_resource" = "1"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H17)"
register "reset_off_delay_ms" = "20"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A10)"
register "enable_delay_ms" = "20"
device usb 2.3 on end
register "desc" = ""Multi-use Port""
register "type" = "UPC_TYPE_A"
register "group" = "ACPI_PLD_GROUP(2, 2)"
device usb 2.3 on
probe DB_PORTS DB_PORTS_1C_LTE
probe DB_PORTS DB_PORTS_1C_1A
end
end
chip drivers/usb/acpi
register "desc" = ""UFCamera""
@ -83,9 +82,13 @@ chip soc/intel/jasperlake
device usb 2.6 on end
end
chip drivers/usb/acpi
register "desc" = ""LTE""
register "type" = "UPC_TYPE_INTERNAL"
device usb 3.3 on end
register "desc" = ""Multi-use Port""
register "type" = "UPC_TYPE_USB3_A"
register "group" = "ACPI_PLD_GROUP(2, 2)"
device usb 3.3 on
probe DB_PORTS DB_PORTS_1C_LTE
probe DB_PORTS DB_PORTS_1C_1A
end
end
end
end

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@ -0,0 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/variants.h>
static struct acpi_gpio lte_reset_gpio = ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H17);
static struct acpi_gpio lte_enable_gpio = ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A10);
void variant_devtree_update(void)
{
update_lte_device(&lte_reset_gpio, &lte_enable_gpio);
}

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@ -1,53 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <acpi/acpi_device.h>
#include <baseboard/variants.h>
#include <console/console.h>
#include <drivers/usb/acpi/chip.h>
#include <fw_config.h>
#include <gpio.h>
#include <soc/pci_devs.h>
#define LTE_USB_PORT_ID 3
#define LTE_USB_PORT_TYPE 2
static struct acpi_gpio lte_reset_gpio = ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H17);
static struct acpi_gpio lte_enable_gpio = ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A10);
static void update_xhci_devtree(void)
{
struct device *xhci, *hub = NULL, *port = NULL;
struct drivers_usb_acpi_config *config;
xhci = pcidev_path_on_root(PCH_DEVFN_XHCI);
if (!xhci) {
printk(BIOS_ERR, "%s: Could not locate XHCI device in DT\n", __func__);
return;
}
while ((hub = dev_bus_each_child(xhci->link_list, hub)) != NULL) {
while ((port = dev_bus_each_child(hub->link_list, port)) != NULL) {
if (!port->chip_info || port->path.usb.port_id != LTE_USB_PORT_ID)
continue;
if (!fw_config_probe(FW_CONFIG(DB_PORTS, DB_PORTS_LTE_HDMI)))
continue;
config = port->chip_info;
config->type = UPC_TYPE_INTERNAL;
if (port->path.usb.port_type == LTE_USB_PORT_TYPE) {
config->has_power_resource = 1;
memcpy(&config->reset_gpio, &lte_reset_gpio,
sizeof(config->reset_gpio));
config->reset_off_delay_ms = 10;
memcpy(&config->enable_gpio, &lte_enable_gpio,
sizeof(config->enable_gpio));
config->enable_delay_ms = 20;
}
}
}
}
void variant_devtree_update(void)
{
update_xhci_devtree();
update_lte_device(&lte_reset_gpio, &lte_enable_gpio);
}