From 8572e33e5c44b14a184c9e0024df283595077386 Mon Sep 17 00:00:00 2001
From: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Date: Tue, 12 Jan 2021 21:29:48 +0800
Subject: [PATCH] soc/mediatek/mt8192: pmic: add scp voltage initialization

Add scp voltage initialization.

BUG=none
BRANCH=none
TEST=boot asurada correctly

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Change-Id: I68302715ae804fed11bb54f4dfc4e90cde5224df
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49355
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
---
 src/soc/mediatek/mt8192/mt6359p.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/soc/mediatek/mt8192/mt6359p.c b/src/soc/mediatek/mt8192/mt6359p.c
index facf70b37d..df8eb39e76 100644
--- a/src/soc/mediatek/mt8192/mt6359p.c
+++ b/src/soc/mediatek/mt8192/mt6359p.c
@@ -170,6 +170,13 @@ static const struct pmic_setting init_setting[] = {
 	{0x202C, 0x8, 0xC, 0},
 	{0x208C, 0x100, 0xF00, 0},
 	{0x209C, 0x80, 0x1E0, 0},
+	/*
+	 * BUCK_VGPU11_OP_MODE/CFG/EN
+	 * Vreq setting for scp usage
+	 */
+	{0x15a0, 0x0, 0x1, 11},
+	{0x159a, 0x0, 0x1, 11},
+	{0x1594, 0x1, 0x1, 11},
 };
 
 static const struct pmic_setting lp_setting[] = {