armv7: create init.S for early ARMv7 init
The old start.S file did a lot of work and had AP-specific #ifndef's. The new init.S will eventually contain only bare minimum generic ARM code for use by the bootblock. Processor-specific stuff and things that take place later in the boot process should go elsewhere. Change-Id: I7db0a77ee4bbad1ddecb193ea125d8941a50532b Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2083 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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@ -142,9 +142,7 @@ endif
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CFLAGS += -D__KERNEL__
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CFLAGS += -D__LINUX_ARM_ARCH__=7
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# FIXME(dhendrix): trying to split start.S apart...
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crt0s = $(src)/arch/armv7/start.S
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#crt0s = $(src)/arch/armv7/romstage.S
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crt0s = $(src)/arch/armv7/init/init.S
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ldscripts =
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ldscripts += $(src)/arch/armv7/romstage.ld
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@ -0,0 +1,94 @@
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/*
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* Early initialization code for ARMv7 architecture.
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*
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* This file is based off of the OMAP3530/ARM Cortex start.S file from Das
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* U-Boot, which itself got the file from armboot.
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*
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* Copyright (c) 2004 Texas Instruments <r-woodruff2@ti.com>
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* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
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* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
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* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
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* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
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* Copyright (c) 2003 Kshitij <kshitij@ti.com>
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* Copyright (c) 2006-2008 Syed Mohammed Khasim <x0khasim@ti.com>
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* Copyright (c) 2013 The Chromium OS Authors
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#define __ASSEMBLY__
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#include <system.h>
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.globl _start
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_start: b reset
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ldr pc, _undefined_instruction
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ldr pc, _software_interrupt
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ldr pc, _prefetch_abort
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ldr pc, _data_abort
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ldr pc, _not_used
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ldr pc, _irq
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ldr pc, _fiq
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_undefined_instruction: .word _undefined_instruction
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_software_interrupt: .word _software_interrupt
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_prefetch_abort: .word _prefetch_abort
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_data_abort: .word _data_abort
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_not_used: .word _not_used
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_irq: .word _irq
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_fiq: .word _fiq
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_pad: .word 0x12345678 /* now 16*4=64 */
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.balignl 16,0xdeadbeef
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reset:
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/*
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* set the cpu to SVC32 mode
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*/
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mrs r0, cpsr
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bic r0, r0, #0x1f
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orr r0, r0, #0xd3
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msr cpsr,r0
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/*
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* From Cortex-A Series Programmer's Guide:
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* Only CPU 0 performs initialization. Other CPUs go into WFI
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* to do this, first work out which CPU this is
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* this code typically is run before any other initialization step
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*/
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mrc p15, 0, r1, c0, c0, 5 @ Read Multiprocessor Affinity Register
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and r1, r1, #0x3 @ Extract CPU ID bits
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cmp r1, #0
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bne wait_for_interrupt @ If this is not core0, wait
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/* Set V=0 in CP15 SCTRL register - for VBAR to point to vector */
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mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTRL Register
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bic r0, #CR_V @ V = 0
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mcr p15, 0, r0, c1, c0, 0 @ Write CP15 SCTRL Register
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/* Set vector address in CP15 VBAR register */
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ldr r0, =_start
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mcr p15, 0, r0, c12, c0, 0 @Set VBAR
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/* Set stackpointer in internal RAM to call board_init_f */
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call_board_init_f:
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ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
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mov sp, r0
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bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
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ldr r0,=0x00000000
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bl board_init_f
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wait_for_interrupt:
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wfi
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mov pc, lr @ back to my caller
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