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LynxPoint: Move RCBA helper function to its own file 

So it can get used in both romstage and ramstage.

Change-Id: Ief9eaafdd91df2a7b668de1a9b83aea3af3ff894
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/2802
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Duncan Laurie 2013-02-15 13:52:28 -08:00 committed by Ronald G. Minnich
parent 738af675d1
commit 8584b223fe
4 changed files with 101 additions and 68 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/southbridge/intel/lynxpoint/Makefile.inc
View File

@ -33,6 +33,7 @@ ramstage-y += usb_ehci.c
ramstage-y += me_9.x.c
ramstage-y += smbus.c
ramstage-y += rcba.c
ramstage-y += me_status.c
ramstage-y += reset.c
ramstage-y += watchdog.c
@ -48,7 +49,7 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me_9.x.c finalize.c
romstage-y += early_usb.c early_smbus.c early_me.c me_status.c early_pch.c
romstage-$(CONFIG_USBDEBUG) += usb_debug.c
romstage-y += reset.c early_spi.c
romstage-y += reset.c early_spi.c rcba.c
ifeq ($(CONFIG_INTEL_LYNXPOINT_LP),y)
romstage-y += lp_gpio.c

43
src/southbridge/intel/lynxpoint/early_pch.c
View File

@ -95,49 +95,6 @@ static void pch_enable_lpc(void)
pci_write_config16(dev, LPC_EN, lpc_config);
}
static void pch_config_rcba(const struct rcba_config_instruction *rcba_config)
{
const struct rcba_config_instruction *rc;
u32 value;
rc = rcba_config;
while (rc->command != RCBA_COMMAND_END)
{
if ((rc->command & RCBA_REG_SIZE_MASK) == RCBA_REG_SIZE_16) {
switch (rc->command & RCBA_COMMAND_MASK) {
case RCBA_COMMAND_SET:
RCBA16(rc->reg) = (u16)rc->or_value;
break;
case RCBA_COMMAND_READ:
(void)RCBA16(rc->reg);
break;
case RCBA_COMMAND_RMW:
value = RCBA16(rc->reg);
value &= rc->mask;
value |= rc->or_value;
RCBA16(rc->reg) = (u16)value;
break;
}
} else {
switch (rc->command & RCBA_COMMAND_MASK) {
case RCBA_COMMAND_SET:
RCBA32(rc->reg) = rc->or_value;
break;
case RCBA_COMMAND_READ:
(void)RCBA32(rc->reg);
break;
case RCBA_COMMAND_RMW:
value = RCBA32(rc->reg);
value &= rc->mask;
value |= rc->or_value;
RCBA32(rc->reg) = value;
break;
}
}
rc++;
}
}
int early_pch_init(const void *gpio_map,
const struct rcba_config_instruction *rcba_config)
{

49
src/southbridge/intel/lynxpoint/pch.h
View File

@ -83,30 +83,6 @@
void intel_pch_finalize_smm(void);
#endif
#if !defined(__ASSEMBLER__) && !defined(__ROMCC__)
#if !defined(__PRE_RAM__) && !defined(__SMM__)
#include <device/device.h>
#include <arch/acpi.h>
#include "chip.h"
int pch_silicon_revision(void);
int pch_silicon_type(void);
int pch_silicon_supported(int type, int rev);
void pch_enable(device_t dev);
void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue);
#if CONFIG_ELOG
void pch_log_state(void);
#endif
void acpi_create_intel_hpet(acpi_hpet_t * hpet);
/* These helpers are for performing SMM relocation. */
void southbridge_smm_init(void);
void southbridge_trigger_smi(void);
void southbridge_clear_smi_status(void);
#else
void enable_smbus(void);
void enable_usb_bar(void);
int smbus_read_byte(unsigned device, unsigned address);
int early_spi_read(u32 offset, u32 size, u8 *buffer);
/* State Machine configuration. */
#define RCBA_REG_SIZE_MASK 0x8000
@ -147,6 +123,31 @@ struct rcba_config_instruction
u32 or_value;
};
#if !defined(__ASSEMBLER__) && !defined(__ROMCC__)
void pch_config_rcba(const struct rcba_config_instruction *rcba_config);
#if !defined(__PRE_RAM__) && !defined(__SMM__)
#include <device/device.h>
#include <arch/acpi.h>
#include "chip.h"
int pch_silicon_revision(void);
int pch_silicon_type(void);
int pch_silicon_supported(int type, int rev);
void pch_enable(device_t dev);
void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue);
#if CONFIG_ELOG
void pch_log_state(void);
#endif
void acpi_create_intel_hpet(acpi_hpet_t * hpet);
/* These helpers are for performing SMM relocation. */
void southbridge_smm_init(void);
void southbridge_trigger_smi(void);
void southbridge_clear_smi_status(void);
#else
void enable_smbus(void);
void enable_usb_bar(void);
int smbus_read_byte(unsigned device, unsigned address);
int early_spi_read(u32 offset, u32 size, u8 *buffer);
int early_pch_init(const void *gpio_map,
const struct rcba_config_instruction *rcba_config);
#endif

74
src/southbridge/intel/lynxpoint/rcba.c Normal file
View File

@ -0,0 +1,74 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2013 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <device/pci_def.h>
#ifdef __PRE_RAM__
#include <arch/io.h>
#include <arch/romcc_io.h>
#else
#include <device/device.h>
#include <device/pci.h>
#endif
#include "pch.h"
void pch_config_rcba(const struct rcba_config_instruction *rcba_config)
{
const struct rcba_config_instruction *rc;
u32 value;
rc = rcba_config;
while (rc->command != RCBA_COMMAND_END)
{
if ((rc->command & RCBA_REG_SIZE_MASK) == RCBA_REG_SIZE_16) {
switch (rc->command & RCBA_COMMAND_MASK) {
case RCBA_COMMAND_SET:
RCBA16(rc->reg) = (u16)rc->or_value;
break;
case RCBA_COMMAND_READ:
(void)RCBA16(rc->reg);
break;
case RCBA_COMMAND_RMW:
value = RCBA16(rc->reg);
value &= rc->mask;
value |= rc->or_value;
RCBA16(rc->reg) = (u16)value;
break;
}
} else {
switch (rc->command & RCBA_COMMAND_MASK) {
case RCBA_COMMAND_SET:
RCBA32(rc->reg) = rc->or_value;
break;
case RCBA_COMMAND_READ:
(void)RCBA32(rc->reg);
break;
case RCBA_COMMAND_RMW:
value = RCBA32(rc->reg);
value &= rc->mask;
value |= rc->or_value;
RCBA32(rc->reg) = value;
break;
}
}
rc++;
}
}