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soc/amd/genoa/include/iomap: add missing I2C and I3C MMIO bases 

All base addresses of MMIO devices in the devicetree should also have
corresponding defines in iomap.h. PPR #55901 Rev 0.26 was used as a
reference.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I0444e6cc0587b484a4a1ff49fa4b1540a24c8e80
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78897
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2023-11-04 04:56:16 +01:00
parent 7bd043eda5
commit 8585fd0872
1 changed files with 7 additions and 0 deletions
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7
src/soc/amd/genoa/include/soc/iomap.h
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@ -18,9 +18,16 @@
#define APU_I2C1_BASE 0xfedc3000
#define APU_I2C2_BASE 0xfedc4000
#define APU_I2C3_BASE 0xfedc5000
#define APU_I2C4_BASE 0xfedc6000
#define APU_I2C5_BASE 0xfedcb000
#define APU_UART0_BASE 0xfedc9000
#define APU_UART1_BASE 0xfedca000
#define APU_UART2_BASE 0xfedce000
#define APU_I3C0_BASE 0xfedd2000
#define APU_I3C1_BASE 0xfedd3000
#define APU_I3C2_BASE 0xfedd4000
#define APU_I3C3_BASE 0xfedd6000
#endif /* AMD_GENOA_IOMAP_H */