soc/intel/adl-n: Add device ID for TCSS XHCI

This patch adds TCSS XHCI device ID for ADL-N CPU which is required
for USB3 port enumeration.

Document Reference: 645548 revision 1.0 (Chapter 2.3)

BUG=None
BRANCH=None
TEST=Check if device is detected correctly and ACPI entries are
generated for device 0d.0

Change-Id: Id5d42d60eb05137406ef45b9e87e27948fc3b674
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62955
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Krishna P Bhat D <krishna.p.bhat.d@intel.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>

src/include/device/pci_ids.h

@@ -4131,6 +4131,7 @@
 #define PCI_DID_INTEL_ADP_P_XHCI		0x51ed
 #define PCI_DID_INTEL_ADP_S_XHCI		0x7ae0
 #define PCI_DID_INTEL_ADP_TCSS_XHCI		0x461e
+#define PCI_DID_INTEL_ADP_N_TCSS_XHCI		0x464e
 #define PCI_DID_INTEL_ADP_M_XHCI		0x54ed
 #define PCI_DID_INTEL_MTL_XHCI			0x7e7d
 #define PCI_DID_INTEL_MTL_M_TCSS_XHCI		0x7eb0

src/soc/intel/common/block/usb4/xhci.c

@@ -31,6 +31,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DID_INTEL_TGP_TCSS_XHCI,
 	PCI_DID_INTEL_TGP_H_TCSS_XHCI,
 	PCI_DID_INTEL_ADP_TCSS_XHCI,
+	PCI_DID_INTEL_ADP_N_TCSS_XHCI,
 	0
 };