Convert 12 more boards to use include statements in Config.lb.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4186 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Carl-Daniel Hailfinger
parent
723bf0c568
commit
85b851add8
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@ -0,0 +1,38 @@
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##
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## Compute the location and size of where this firmware image
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## (coreboot plus bootloader) will live in the boot rom chip.
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##
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
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else
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default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
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default ROM_SECTION_OFFSET = 0
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end
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##
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## Compute the start location and size size of
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## The coreboot bootloader.
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##
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default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
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default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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##
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## Compute where this copy of coreboot will start in the boot rom
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##
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default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
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##
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## Compute a range of ROM that can cached to speed up coreboot,
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## execution speed.
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##
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## XIP_ROM_SIZE must be a power of 2.
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## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
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##
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default XIP_ROM_SIZE = 128 * 1024
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default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE )
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## This is needed to work around a parser bug.
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if USE_FALLBACK_IMAGE
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end
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@ -1,36 +1,4 @@
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##
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include /config/nofailovercalculation128.lb
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## Compute the location and size of where this firmware image
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## (coreboot plus bootloader) will live in the boot rom chip.
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##
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
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else
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default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
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default ROM_SECTION_OFFSET = 0
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end
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##
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## Compute the start location and size size of
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## The coreboot bootloader.
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##
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default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
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default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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##
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## Compute where this copy of coreboot will start in the boot rom
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##
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default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
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##
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## Compute a range of ROM that can cached to speed up coreboot,
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## execution speed.
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##
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## XIP_ROM_SIZE must be a power of 2.
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## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
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##
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default XIP_ROM_SIZE=131072
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default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
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##
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##
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## Set all of the defaults for an x86 architecture
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## Set all of the defaults for an x86 architecture
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@ -3,39 +3,7 @@
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##
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##
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default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
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default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
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##
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include /config/nofailovercalculation128.lb
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## Compute the location and size of where this firmware image
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## (coreboot plus bootloader) will live in the boot rom chip.
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##
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
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else
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default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
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default ROM_SECTION_OFFSET = 0
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end
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##
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## Compute the start location and size size of
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## The coreboot bootloader.
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##
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default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
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default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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##
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## Compute where this copy of coreboot will start in the boot rom
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##
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default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
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##
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## Compute a range of ROM that can cached to speed up coreboot,
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## execution speed.
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##
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## XIP_ROM_SIZE must be a power of 2.
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## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
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##
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default XIP_ROM_SIZE=131072
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default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
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##
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##
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## Set all of the defaults for an x86 architecture
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## Set all of the defaults for an x86 architecture
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@ -3,39 +3,7 @@
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##
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##
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default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
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default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
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##
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include /config/nofailovercalculation128.lb
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## Compute the location and size of where this firmware image
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## (coreboot plus bootloader) will live in the boot rom chip.
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##
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
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else
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default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
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default ROM_SECTION_OFFSET = 0
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end
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##
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## Compute the start location and size size of
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## The coreboot bootloader.
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##
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default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
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default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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##
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## Compute where this copy of coreboot will start in the boot rom
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##
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default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
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##
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## Compute a range of ROM that can cached to speed up coreboot,
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## execution speed.
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##
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## XIP_ROM_SIZE must be a power of 2.
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## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
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##
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default XIP_ROM_SIZE=131072
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default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
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##
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##
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## Set all of the defaults for an x86 architecture
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## Set all of the defaults for an x86 architecture
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@ -17,38 +17,7 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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##
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##
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include /config/nofailovercalculation128.lb
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## Compute the location and size of where this firmware image
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## (coreboot plus bootloader) will live in the boot ROM chip
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##
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
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else
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default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
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default ROM_SECTION_OFFSET = 0
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end
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##
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## Compute the start location and size size of the coreboot bootloader
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##
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default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
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default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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##
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## Compute where this copy of coreboot will start in the boot ROM
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##
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default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
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##
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## Compute a range of ROM that can cached to speed up coreboot,
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## execution speed.
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##
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## XIP_ROM_SIZE must be a power of 2.
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## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
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##
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default XIP_ROM_SIZE=131072
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default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
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##
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##
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## Set all of the defaults for an x86 architecture
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## Set all of the defaults for an x86 architecture
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@ -17,38 +17,7 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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##
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##
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include /config/nofailovercalculation128.lb
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## Compute the location and size of where this firmware image
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## (coreboot plus bootloader) will live in the boot ROM chip
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##
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
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else
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default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
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default ROM_SECTION_OFFSET = 0
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end
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##
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## Compute the start location and size size of the coreboot bootloader
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##
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default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
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default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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##
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## Compute where this copy of coreboot will start in the boot ROM
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##
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default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
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##
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## Compute a range of ROM that can cached to speed up coreboot,
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## execution speed.
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##
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## XIP_ROM_SIZE must be a power of 2.
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## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
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##
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default XIP_ROM_SIZE=131072
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default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
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##
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##
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## Set all of the defaults for an x86 architecture
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## Set all of the defaults for an x86 architecture
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@ -1,39 +1,4 @@
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##################################################################
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include /config/nofailovercalculation128.lb
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## BEGIN BOILERPLATE - DO NOT EDIT
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##
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## Compute the location and size of where this firmware image
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## (coreboot plus payload) will live in the boot rom chip.
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##
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if USE_FALLBACK_IMAGE
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# The fallback image uses FALLBACK_SIZE bytes at the end of the ROM
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
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else
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# The normal image goes at the beginning of the coreboot ROM region
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# and uses all the remaining space
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default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
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default ROM_SECTION_OFFSET = 0
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end
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##
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## Compute where this copy of coreboot will start in the boot rom
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##
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default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
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##
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## Compute a range of ROM that can cached to speed up coreboot,
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## execution speed.
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##
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## XIP_ROM_SIZE must be a power of 2.
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## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
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default XIP_ROM_SIZE = 65536
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default XIP_ROM_BASE = ((( _ROMBASE + ROM_IMAGE_SIZE ) / XIP_ROM_SIZE ) * XIP_ROM_SIZE - XIP_ROM_SIZE )
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## END BOILERPLATE
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##################################################################
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arch i386 end
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arch i386 end
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@ -28,39 +28,7 @@
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##
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##
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default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
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default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
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##
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include /config/nofailovercalculation.lb
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## Compute the location and size of where this firmware image
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## (coreboot plus bootloader) will live in the boot rom chip.
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##
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
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else
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default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
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default ROM_SECTION_OFFSET = 0
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end
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##
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## Compute the start location and size size of
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## The coreboot bootloader.
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##
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default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
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default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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##
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## Compute where this copy of coreboot will start in the boot rom
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##
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default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
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##
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||||||
## Compute a range of ROM that can cached to speed up coreboot,
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## execution speed.
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##
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## XIP_ROM_SIZE must be a power of 2.
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## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
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##
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default XIP_ROM_SIZE=(64*1024)
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default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
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##
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##
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## Set all of the defaults for an x86 architecture
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## Set all of the defaults for an x86 architecture
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||||||
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@ -3,39 +3,7 @@
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##
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##
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default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
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default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
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||||||
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|
||||||
##
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include /config/nofailovercalculation128.lb
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||||||
## Compute the location and size of where this firmware image
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||||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
|
||||||
##
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|
||||||
if USE_FALLBACK_IMAGE
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||||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
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||||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
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else
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default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
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default ROM_SECTION_OFFSET = 0
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end
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||||||
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|
||||||
##
|
|
||||||
## Compute the start location and size size of
|
|
||||||
## The coreboot bootloader.
|
|
||||||
##
|
|
||||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
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||||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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||||||
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##
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||||||
## Compute where this copy of coreboot will start in the boot rom
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||||||
##
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||||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
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|
||||||
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|
||||||
##
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|
||||||
## Compute a range of ROM that can be cached to speed up coreboot,
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|
||||||
## execution speed.
|
|
||||||
##
|
|
||||||
## XIP_ROM_SIZE must be a power of 2.
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|
||||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
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|
||||||
##
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|
||||||
default XIP_ROM_SIZE=131072
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||||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
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|
||||||
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|
||||||
##
|
##
|
||||||
## Set all of the defaults for an x86 architecture
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## Set all of the defaults for an x86 architecture
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||||||
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|
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||||||
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@ -3,39 +3,8 @@
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||||||
##
|
##
|
||||||
default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
|
default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
|
||||||
|
|
||||||
##
|
include /config/nofailovercalculation128.lb
|
||||||
## Compute the location and size of where this firmware image
|
|
||||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
|
||||||
##
|
|
||||||
if USE_FALLBACK_IMAGE
|
|
||||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
|
||||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
|
||||||
else
|
|
||||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
|
||||||
default ROM_SECTION_OFFSET = 0
|
|
||||||
end
|
|
||||||
|
|
||||||
##
|
|
||||||
## Compute the start location and size size of
|
|
||||||
## The coreboot bootloader.
|
|
||||||
##
|
|
||||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
|
||||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
|
||||||
|
|
||||||
##
|
|
||||||
## Compute where this copy of coreboot will start in the boot rom
|
|
||||||
##
|
|
||||||
default _ROMBASE =( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
|
||||||
|
|
||||||
##
|
|
||||||
## Compute a range of ROM that can be cached to speed up coreboot.
|
|
||||||
## execution speed.
|
|
||||||
## XIP_ROM_SIZE must be a power of 2.
|
|
||||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
|
||||||
default XIP_ROM_SIZE=131072
|
|
||||||
default XIP_ROM_BASE= ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
|
||||||
|
|
||||||
##
|
|
||||||
## Set all of the defaults for an x86 architecture
|
## Set all of the defaults for an x86 architecture
|
||||||
##
|
##
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -3,39 +3,8 @@
|
||||||
##
|
##
|
||||||
default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
|
default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
|
||||||
|
|
||||||
##
|
include /config/nofailovercalculation128.lb
|
||||||
## Compute the location and size of where this firmware image
|
|
||||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
|
||||||
##
|
|
||||||
if USE_FALLBACK_IMAGE
|
|
||||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
|
||||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
|
||||||
else
|
|
||||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
|
||||||
default ROM_SECTION_OFFSET = 0
|
|
||||||
end
|
|
||||||
|
|
||||||
##
|
|
||||||
## Compute the start location and size size of
|
|
||||||
## The coreboot bootloader.
|
|
||||||
##
|
|
||||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
|
||||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
|
||||||
|
|
||||||
##
|
|
||||||
## Compute where this copy of coreboot will start in the boot rom
|
|
||||||
##
|
|
||||||
default _ROMBASE =( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
|
||||||
|
|
||||||
##
|
|
||||||
## Compute a range of ROM that can be cached to speed up coreboot.
|
|
||||||
## execution speed.
|
|
||||||
## XIP_ROM_SIZE must be a power of 2.
|
|
||||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
|
||||||
default XIP_ROM_SIZE=131072
|
|
||||||
default XIP_ROM_BASE= ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
|
||||||
|
|
||||||
##
|
|
||||||
## Set all of the defaults for an x86 architecture
|
## Set all of the defaults for an x86 architecture
|
||||||
##
|
##
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -3,39 +3,7 @@
|
||||||
##
|
##
|
||||||
default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
|
default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
|
||||||
|
|
||||||
##
|
include /config/nofailovercalculation128.lb
|
||||||
## Compute the location and size of where this firmware image
|
|
||||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
|
||||||
##
|
|
||||||
if USE_FALLBACK_IMAGE
|
|
||||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
|
||||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
|
||||||
else
|
|
||||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
|
||||||
default ROM_SECTION_OFFSET = 0
|
|
||||||
end
|
|
||||||
|
|
||||||
##
|
|
||||||
## Compute the start location and size size of
|
|
||||||
## The coreboot bootloader.
|
|
||||||
##
|
|
||||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
|
||||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
|
||||||
|
|
||||||
##
|
|
||||||
## Compute where this copy of coreboot will start in the boot rom
|
|
||||||
##
|
|
||||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
|
||||||
|
|
||||||
##
|
|
||||||
## Compute a range of ROM that can cached to speed up coreboot,
|
|
||||||
## execution speed.
|
|
||||||
##
|
|
||||||
## XIP_ROM_SIZE must be a power of 2.
|
|
||||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
|
||||||
##
|
|
||||||
default XIP_ROM_SIZE=131072
|
|
||||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
|
||||||
|
|
||||||
##
|
##
|
||||||
## Set all of the defaults for an x86 architecture
|
## Set all of the defaults for an x86 architecture
|
||||||
|
|
|
||||||
|
|
@ -3,39 +3,7 @@
|
||||||
##
|
##
|
||||||
default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
|
default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
|
||||||
|
|
||||||
##
|
include /config/nofailovercalculation128.lb
|
||||||
## Compute the location and size of where this firmware image
|
|
||||||
## (coreboot plus bootloader) will live in the boot rom chip.
|
|
||||||
##
|
|
||||||
if USE_FALLBACK_IMAGE
|
|
||||||
default ROM_SECTION_SIZE = FALLBACK_SIZE
|
|
||||||
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
|
|
||||||
else
|
|
||||||
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
|
|
||||||
default ROM_SECTION_OFFSET = 0
|
|
||||||
end
|
|
||||||
|
|
||||||
##
|
|
||||||
## Compute the start location and size size of
|
|
||||||
## The coreboot bootloader.
|
|
||||||
##
|
|
||||||
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
|
|
||||||
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
|
|
||||||
|
|
||||||
##
|
|
||||||
## Compute where this copy of coreboot will start in the boot rom
|
|
||||||
##
|
|
||||||
default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
|
|
||||||
|
|
||||||
##
|
|
||||||
## Compute a range of ROM that can cached to speed up coreboot,
|
|
||||||
## execution speed.
|
|
||||||
##
|
|
||||||
## XIP_ROM_SIZE must be a power of 2.
|
|
||||||
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
|
|
||||||
##
|
|
||||||
default XIP_ROM_SIZE=131072
|
|
||||||
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
|
|
||||||
|
|
||||||
##
|
##
|
||||||
## Set all of the defaults for an x86 architecture
|
## Set all of the defaults for an x86 architecture
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue