From 85d9f470144b8a125b5e439de19138fd5d83c1d5 Mon Sep 17 00:00:00 2001 From: Maulik V Vaghela Date: Mon, 8 Nov 2021 07:53:37 +0000 Subject: [PATCH] Revert "soc/intel/adl: Drop SGPM, RGPM and EGPM methods" This reverts commit 1399442289607acc5203fb12df64e9081b3c3aa4. Reason for revert: Some Cr50 chips with old firmware version (x.y.22) don't support long pulse interrupt command, requiring dynamic GPIO PM to be disabled to intercept short pulse interrupt. Due to this coreboot needs to expose SGPM, RGPM and EGPM ACPI methods to support power gating of GPIO communities from the kernel when dynamic GPIO PM is disabled. BUG=b:204832081 BRANCH=None Test= S0ix works with dynamic PM disabled. Signed-off-by: Maulik V Vaghela Change-Id: I2b5b00878062f8a499641d7a47db54ed078cd6cf Reviewed-on: https://review.coreboot.org/c/coreboot/+/58811 Tested-by: build bot (Jenkins) Reviewed-by: Scott Chao Reviewed-by: Subrata Banik --- src/soc/intel/alderlake/acpi/gpio.asl | 41 +++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/src/soc/intel/alderlake/acpi/gpio.asl b/src/soc/intel/alderlake/acpi/gpio.asl index 6a1ba0074e..376afaba1e 100644 --- a/src/soc/intel/alderlake/acpi/gpio.asl +++ b/src/soc/intel/alderlake/acpi/gpio.asl @@ -137,3 +137,44 @@ Method (GPID, 1, Serialized) Return (Local0) } + +/* GPIO Power Management bits */ +Name(GPMB, Package(TOTAL_GPIO_COMM) {0, 0, 0, 0, 0, 0}) + +/* + * Save GPIO Power Management bits + */ +Method (SGPM, 0, Serialized) +{ + For (Local0 = 0, Local0 < TOTAL_GPIO_COMM, Local0++) + { + Local1 = GPID (Local0) + GPMB[Local0] = PCRR (Local1, GPIO_MISCCFG) + } +} + +/* + * Restore GPIO Power Management bits + */ +Method (RGPM, 0, Serialized) +{ + For (Local0 = 0, Local0 < TOTAL_GPIO_COMM, Local0++) + { + CGPM (Local0, DerefOf(GPMB[Local0])) + } +} + +/* + * Save current setting of GPIO Power Management bits and + * enable all Power Management bits for all communities + */ +Method (EGPM, 0, Serialized) +{ + /* Save current setting and will restore it when resuming */ + SGPM () + /* Enable PM bits */ + For (Local0 = 0, Local0 < TOTAL_GPIO_COMM, Local0++) + { + CGPM (Local0, MISCCFG_GPIO_PM_CONFIG_BITS) + } +}