soc/intel/alderlake: Select `X86_CLFLUSH_CAR` config

This patch selects `X86_CLFLUSH_CAR` config for running `clflush`
to invalidate the cache region based on commit 3134a81 for boot
performance improvement.

Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: I1fe6072a3c23a02c9a691406f179bfc8f0f18a93
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73685
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Lean Sheng Tan 2023-03-13 14:51:10 +01:00
parent 0e5f51e186
commit 8615245349
1 changed files with 1 additions and 0 deletions

View File

@ -131,6 +131,7 @@ config CPU_SPECIFIC_OPTIONS
select UDELAY_TSC select UDELAY_TSC
select UDK_202005_BINDING select UDK_202005_BINDING
select VBOOT_LIB select VBOOT_LIB
select X86_CLFLUSH_CAR
config SOC_INTEL_ALDERLAKE_TCSS_USB4_SUPPORT config SOC_INTEL_ALDERLAKE_TCSS_USB4_SUPPORT
bool bool