soc/intel/fsp_broadwell_de: Select RELOCATABLE_RAMSTAGE

Tested on wedge100s.

Change-Id: I0dcbce230c151cecbbbeec581964cd5f44fbe046
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/29911
Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Arthur Heymans 2018-11-29 02:47:06 +01:00 committed by Patrick Georgi
parent e4aadd323c
commit 8616442150
1 changed files with 0 additions and 1 deletions

View File

@ -15,7 +15,6 @@ config CPU_SPECIFIC_OPTIONS
select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON
select SOUTHBRIDGE_INTEL_COMMON_SPI select SOUTHBRIDGE_INTEL_COMMON_SPI
select SOUTHBRIDGE_INTEL_COMMON_RESET select SOUTHBRIDGE_INTEL_COMMON_RESET
select NO_RELOCATABLE_RAMSTAGE
select PARALLEL_MP select PARALLEL_MP
select SMP select SMP
select IOAPIC select IOAPIC