soc/intel/fsp_broadwell_de: Select RELOCATABLE_RAMSTAGE
Tested on wedge100s. Change-Id: I0dcbce230c151cecbbbeec581964cd5f44fbe046 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/29911 Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -15,7 +15,6 @@ config CPU_SPECIFIC_OPTIONS
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select SOUTHBRIDGE_INTEL_COMMON
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select SOUTHBRIDGE_INTEL_COMMON_SPI
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select SOUTHBRIDGE_INTEL_COMMON_RESET
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select NO_RELOCATABLE_RAMSTAGE
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select PARALLEL_MP
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select SMP
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select IOAPIC
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