sb/nvidia/mcp55: Link early_ctrl.c

Change-Id: I3a55c2e8077fdb10768df287f38efcd5e2e64bdf
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19365
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Arthur Heymans 2017-04-19 13:19:15 +02:00 committed by Martin Roth
parent 3eff00ec76
commit 8621a135d4
15 changed files with 8 additions and 13 deletions

View File

@ -62,7 +62,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address);
}
#include "southbridge/nvidia/mcp55/early_ctrl.c"
#include <northbridge/amd/amdk8/f.h>
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "northbridge/amd/amdk8/coherent_ht.c"

View File

@ -67,7 +67,6 @@ int spd_read_byte(unsigned device, unsigned address)
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+59, 0x00, 0x60,/* GPIP60 FANCTL0 */ \
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+60, 0x00, 0x60,/* GPIO61 FANCTL1 */
#include "southbridge/nvidia/mcp55/early_ctrl.c"
#include <southbridge/nvidia/mcp55/early_setup_ss.h>
#include "southbridge/nvidia/mcp55/early_setup_car.c"
#include <northbridge/amd/amdk8/f.h>

View File

@ -61,7 +61,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address);
}
#include "southbridge/nvidia/mcp55/early_ctrl.c"
#include <northbridge/amd/amdk8/f.h>
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "northbridge/amd/amdk8/coherent_ht.c"

View File

@ -70,7 +70,6 @@ int spd_read_byte(unsigned device, unsigned address)
return smbus_read_byte(device, address);
}
#include "southbridge/nvidia/mcp55/early_ctrl.c"
#include <northbridge/amd/amdk8/f.h>
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "northbridge/amd/amdk8/coherent_ht.c"

View File

@ -42,7 +42,6 @@
#include <arch/early_variables.h>
#include <cbmem.h>
#include <southbridge/nvidia/mcp55/mcp55.h>
#include "southbridge/nvidia/mcp55/early_ctrl.c"
#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"

View File

@ -60,7 +60,6 @@ int spd_read_byte(unsigned device, unsigned address)
return smbus_read_byte(device, address);
}
#include "southbridge/nvidia/mcp55/early_ctrl.c"
#include <northbridge/amd/amdk8/f.h>
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "northbridge/amd/amdk8/coherent_ht.c"

View File

@ -59,7 +59,6 @@ int spd_read_byte(unsigned device, unsigned address)
return smbus_read_byte(device, address);
}
#include "southbridge/nvidia/mcp55/early_ctrl.c"
#include <northbridge/amd/amdk8/f.h>
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "northbridge/amd/amdk8/coherent_ht.c"

View File

@ -69,7 +69,6 @@ int spd_read_byte(unsigned device, unsigned address)
return smbus_read_byte(device, address);
}
#include "southbridge/nvidia/mcp55/early_ctrl.c"
#include <northbridge/amd/amdk8/f.h>
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "northbridge/amd/amdk8/coherent_ht.c"

View File

@ -61,7 +61,6 @@ int spd_read_byte(unsigned device, unsigned address)
return smbus_read_byte(device, address);
}
#include "southbridge/nvidia/mcp55/early_ctrl.c"
#include <northbridge/amd/amdk8/f.h>
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "northbridge/amd/amdk8/coherent_ht.c"

View File

@ -43,7 +43,6 @@
#include <cbmem.h>
#include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN
#include "southbridge/nvidia/mcp55/early_ctrl.c"
#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"

View File

@ -42,7 +42,6 @@
#include <arch/early_variables.h>
#include <cbmem.h>
#include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN
#include "southbridge/nvidia/mcp55/early_ctrl.c"
#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"

View File

@ -60,7 +60,6 @@ int spd_read_byte(unsigned device, unsigned address)
return smbus_read_byte(device, address);
}
#include "southbridge/nvidia/mcp55/early_ctrl.c"
#include <northbridge/amd/amdk8/f.h>
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "northbridge/amd/amdk8/coherent_ht.c"

View File

@ -42,7 +42,6 @@
#include <arch/early_variables.h>
#include <cbmem.h>
#include <southbridge/nvidia/mcp55/mcp55.h>
#include "southbridge/nvidia/mcp55/early_ctrl.c"
#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"

View File

@ -20,6 +20,7 @@ ramstage-y += reset.c
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-y += early_smbus.c
romstage-y += early_ctrl.c
ifeq ($(CONFIG_MCP55_USE_AZA),y)
ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c

View File

@ -15,7 +15,14 @@
* GNU General Public License for more details.
*/
#include <arch/io.h>
#include <console/console.h>
#include <reset.h>
#if IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AMDK8)
#include <northbridge/amd/amdk8/amdk8.h>
#else /* CONFIG_NORTHBRIDGE_AMD_AMDFAM10 */
#include <northbridge/amd/amdfam10/amdfam10.h>
#endif
#include "mcp55.h"
void soft_reset(void)