sb/nvidia/mcp55: Link early_ctrl.c
Change-Id: I3a55c2e8077fdb10768df287f38efcd5e2e64bdf Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19365 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -62,7 +62,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
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return smbus_read_byte(device, address);
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}
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#include "southbridge/nvidia/mcp55/early_ctrl.c"
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#include <northbridge/amd/amdk8/f.h>
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#include "northbridge/amd/amdk8/incoherent_ht.c"
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#include "northbridge/amd/amdk8/coherent_ht.c"
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@ -67,7 +67,6 @@ int spd_read_byte(unsigned device, unsigned address)
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RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+59, 0x00, 0x60,/* GPIP60 FANCTL0 */ \
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RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+60, 0x00, 0x60,/* GPIO61 FANCTL1 */
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#include "southbridge/nvidia/mcp55/early_ctrl.c"
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#include <southbridge/nvidia/mcp55/early_setup_ss.h>
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#include "southbridge/nvidia/mcp55/early_setup_car.c"
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#include <northbridge/amd/amdk8/f.h>
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@ -61,7 +61,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
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return smbus_read_byte(device, address);
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}
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#include "southbridge/nvidia/mcp55/early_ctrl.c"
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#include <northbridge/amd/amdk8/f.h>
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#include "northbridge/amd/amdk8/incoherent_ht.c"
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#include "northbridge/amd/amdk8/coherent_ht.c"
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@ -70,7 +70,6 @@ int spd_read_byte(unsigned device, unsigned address)
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return smbus_read_byte(device, address);
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}
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#include "southbridge/nvidia/mcp55/early_ctrl.c"
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#include <northbridge/amd/amdk8/f.h>
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#include "northbridge/amd/amdk8/incoherent_ht.c"
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#include "northbridge/amd/amdk8/coherent_ht.c"
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@ -42,7 +42,6 @@
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#include <arch/early_variables.h>
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#include <cbmem.h>
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#include <southbridge/nvidia/mcp55/mcp55.h>
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#include "southbridge/nvidia/mcp55/early_ctrl.c"
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#include "resourcemap.c"
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#include "cpu/amd/quadcore/quadcore.c"
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@ -60,7 +60,6 @@ int spd_read_byte(unsigned device, unsigned address)
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return smbus_read_byte(device, address);
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}
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#include "southbridge/nvidia/mcp55/early_ctrl.c"
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#include <northbridge/amd/amdk8/f.h>
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#include "northbridge/amd/amdk8/incoherent_ht.c"
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#include "northbridge/amd/amdk8/coherent_ht.c"
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@ -59,7 +59,6 @@ int spd_read_byte(unsigned device, unsigned address)
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return smbus_read_byte(device, address);
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}
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#include "southbridge/nvidia/mcp55/early_ctrl.c"
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#include <northbridge/amd/amdk8/f.h>
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#include "northbridge/amd/amdk8/incoherent_ht.c"
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#include "northbridge/amd/amdk8/coherent_ht.c"
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@ -69,7 +69,6 @@ int spd_read_byte(unsigned device, unsigned address)
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return smbus_read_byte(device, address);
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}
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#include "southbridge/nvidia/mcp55/early_ctrl.c"
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#include <northbridge/amd/amdk8/f.h>
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#include "northbridge/amd/amdk8/incoherent_ht.c"
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#include "northbridge/amd/amdk8/coherent_ht.c"
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@ -61,7 +61,6 @@ int spd_read_byte(unsigned device, unsigned address)
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return smbus_read_byte(device, address);
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}
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#include "southbridge/nvidia/mcp55/early_ctrl.c"
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#include <northbridge/amd/amdk8/f.h>
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#include "northbridge/amd/amdk8/incoherent_ht.c"
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#include "northbridge/amd/amdk8/coherent_ht.c"
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@ -43,7 +43,6 @@
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#include <cbmem.h>
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#include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN
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#include "southbridge/nvidia/mcp55/early_ctrl.c"
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#include "resourcemap.c"
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#include "cpu/amd/quadcore/quadcore.c"
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@ -42,7 +42,6 @@
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#include <arch/early_variables.h>
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#include <cbmem.h>
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#include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN
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#include "southbridge/nvidia/mcp55/early_ctrl.c"
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#include "resourcemap.c"
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#include "cpu/amd/quadcore/quadcore.c"
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@ -60,7 +60,6 @@ int spd_read_byte(unsigned device, unsigned address)
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return smbus_read_byte(device, address);
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}
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#include "southbridge/nvidia/mcp55/early_ctrl.c"
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#include <northbridge/amd/amdk8/f.h>
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#include "northbridge/amd/amdk8/incoherent_ht.c"
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#include "northbridge/amd/amdk8/coherent_ht.c"
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@ -42,7 +42,6 @@
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#include <arch/early_variables.h>
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#include <cbmem.h>
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#include <southbridge/nvidia/mcp55/mcp55.h>
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#include "southbridge/nvidia/mcp55/early_ctrl.c"
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#include "resourcemap.c"
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#include "cpu/amd/quadcore/quadcore.c"
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@ -20,6 +20,7 @@ ramstage-y += reset.c
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romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
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ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
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romstage-y += early_smbus.c
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romstage-y += early_ctrl.c
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ifeq ($(CONFIG_MCP55_USE_AZA),y)
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ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c
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@ -15,7 +15,14 @@
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* GNU General Public License for more details.
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*/
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#include <arch/io.h>
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#include <console/console.h>
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#include <reset.h>
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#if IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AMDK8)
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#include <northbridge/amd/amdk8/amdk8.h>
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#else /* CONFIG_NORTHBRIDGE_AMD_AMDFAM10 */
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#include <northbridge/amd/amdfam10/amdfam10.h>
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#endif
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#include "mcp55.h"
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void soft_reset(void)
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