a few tweaks etc.
Still probably wrong. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1156 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -371,6 +371,8 @@ static void sdram_set_registers(const struct mem_controller *ctrl) {
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0x0000, 0x8088, 0xe0ee,
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0xffff // end mark
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};
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static cont uint8_t ramregs[] = {0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
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0x56, 0x57};
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device_t north = 0;
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uint8_t c, r;
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@ -514,7 +516,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl) {
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* Find the first bank with DIMM equipped. */
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/* Maximum possible memory in bank 0, none in other banks.
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* Starting from bank 0, we's fill 0 in these registers
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* Starting from bank 0, we fill 0 in these registers
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* until memory is found. */
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pci_write_config8(north,0x5A, 0xff);
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pci_write_config8(north,0x5B, 0xff);
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@ -526,8 +528,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl) {
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pci_write_config8(north,0x57, 0xff);
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dumpnorth(north);
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print_err("MA\r\n");
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/* this code is broken ... ignores 56, 57 */
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for(c = 0x5a; c < 0x60; c++) {
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for(c = 0; c < 8; c++) {
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/* Write different values to 0 and 8, then read from 0.
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* If values of address 0 match, we have something there. */
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print_err("write to 0\r\n");
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@ -542,11 +543,11 @@ static void sdram_set_registers(const struct mem_controller *ctrl) {
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if (*(volatile unsigned long *) 0 != 0x12345678) {
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print_err("no memory in this bank\r\n");
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/* No memory in this bank. Tell it to the bridge. */
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pci_write_config8(north,c, 0);
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pci_write_config8(north,ramregs[c], 0);
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} else {
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uint8_t best = 0;
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/* Detect MA mapping type of the first bank. */
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/* Detect MA mapping type of the bank. */
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for(r = 0; r < 3; r++) {
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volatile unsigned long esi = 0;
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@ -571,7 +572,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl) {
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eax >>= 1;
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}
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print_err(" done read to eax\r\n");
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eax = 0;
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eax = * (unsigned long *)0;
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/* oh boy ... what is this.
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movl 0, %eax
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cmpl %eax, %esi
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