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peppy: Add backward-compatible RAM_ID table. 

Make use of google_chromeec_get_board_version to determine board
version, and apply proper RAM_ID table to load correct SPD.

Change-Id: I6a2d54759cf2ce98bf53df0db396c6e09368c714
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/61192
Reviewed-by: Dave Parker <dparker@chromium.org>
Reviewed-on: http://review.coreboot.org/4353
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Shawn Nematbakhsh 2013-07-08 14:26:35 -07:00 committed by Stefan Reinauer
parent aa1b10617d
commit 865912cec0
2 changed files with 24 additions and 5 deletions
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3
src/mainboard/google/peppy/onboard.h
View File

@ -37,4 +37,7 @@
#define BOARD_TOUCHSCREEN_I2C_BUS 2 /* I2C1 */ #define BOARD_TOUCHSCREEN_I2C_BUS 2 /* I2C1 */
#define BOARD_TOUCHSCREEN_I2C_ADDR 0x4a #define BOARD_TOUCHSCREEN_I2C_ADDR 0x4a
#define PEPPY_BOARD_VERSION_PROTO 0
#define PEPPY_BOARD_VERSION_EVT 1
#endif #endif

26
src/mainboard/google/peppy/romstage.c
View File

@ -25,11 +25,13 @@
#include <cbfs.h> #include <cbfs.h>
#include <console/console.h> #include <console/console.h>
#include "cpu/intel/haswell/haswell.h" #include "cpu/intel/haswell/haswell.h"
#include "ec/google/chromeec/ec.h"
#include "northbridge/intel/haswell/haswell.h" #include "northbridge/intel/haswell/haswell.h"
#include "northbridge/intel/haswell/raminit.h" #include "northbridge/intel/haswell/raminit.h"
#include "southbridge/intel/lynxpoint/pch.h" #include "southbridge/intel/lynxpoint/pch.h"
#include "southbridge/intel/lynxpoint/lp_gpio.h" #include "southbridge/intel/lynxpoint/lp_gpio.h"
#include "gpio.h" #include "gpio.h"
#include "onboard.h"
const struct rcba_config_instruction rcba_config[] = { const struct rcba_config_instruction rcba_config[] = {
@ -83,6 +85,25 @@ static void copy_spd(struct pei_data *peid)
if (!spd_file) if (!spd_file)
die("SPD data not found."); die("SPD data not found.");
switch (google_chromeec_get_board_version()) {
case PEPPY_BOARD_VERSION_PROTO:
/* Index 0 is 2GB config with CH0 only. */
if (spd_index == 0)
peid->dimm_channel1_disabled = 3;
break;
case PEPPY_BOARD_VERSION_EVT:
default:
/* Index 0-2 are 4GB config with both CH0 and CH1.
* Index 4-6 are 2GB config with CH0 only. */
if (spd_index > 3)
{
peid->dimm_channel1_disabled = 3;
spd_index &= 0x03;
}
break;
}
if (ntohl(spd_file->len) < if (ntohl(spd_file->len) <
((spd_index + 1) * sizeof(peid->spd_data[0]))) { ((spd_index + 1) * sizeof(peid->spd_data[0]))) {
printk(BIOS_ERR, "SPD index override to 0 - old hardware?\n"); printk(BIOS_ERR, "SPD index override to 0 - old hardware?\n");
@ -92,11 +113,6 @@ static void copy_spd(struct pei_data *peid)
if (spd_file->len < sizeof(peid->spd_data[0])) if (spd_file->len < sizeof(peid->spd_data[0]))
die("Missing SPD data."); die("Missing SPD data.");
/* Index 0-2 are 4GB config with both CH0 and CH1
* Index 4-6 are 2GB config with CH0 only */
if (spd_index > 3)
peid->dimm_channel1_disabled = 3;
memcpy(peid->spd_data[0], memcpy(peid->spd_data[0],
((char*)CBFS_SUBHEADER(spd_file)) + ((char*)CBFS_SUBHEADER(spd_file)) +
spd_index * sizeof(peid->spd_data[0]), spd_index * sizeof(peid->spd_data[0]),