After this has been brought up many times before, rename src/arch/i386 to
src/arch/x86. Signed-off-by: Stefan Reinauer <stepan@coreboot.org> Acked-by: Patrick Georgi <patrick@georgi-clan.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6161 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
parent
198cb96387
commit
8677a23d5b
2
Makefile
2
Makefile
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@ -114,7 +114,7 @@ endif
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strip_quotes = $(subst ",,$(subst \",,$(1)))
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strip_quotes = $(subst ",,$(subst \",,$(1)))
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ARCHDIR-$(CONFIG_ARCH_X86) := i386
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ARCHDIR-$(CONFIG_ARCH_X86) := x86
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ARCHDIR-$(CONFIG_ARCH_POWERPC) := ppc
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ARCHDIR-$(CONFIG_ARCH_POWERPC) := ppc
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MAINBOARDDIR=$(call strip_quotes,$(CONFIG_MAINBOARD_DIR))
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MAINBOARDDIR=$(call strip_quotes,$(CONFIG_MAINBOARD_DIR))
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@ -101,7 +101,7 @@ config USE_OPTION_TABLE
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endmenu
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endmenu
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source src/mainboard/Kconfig
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source src/mainboard/Kconfig
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source src/arch/i386/Kconfig
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source src/arch/x86/Kconfig
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menu "Chipset"
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menu "Chipset"
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@ -481,7 +481,7 @@ config GDB_STUB
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default y
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default y
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help
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help
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If enabled, you will be able to set breakpoints for gdb debugging.
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If enabled, you will be able to set breakpoints for gdb debugging.
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See src/arch/i386/lib/c_start.S for details.
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See src/arch/x86/lib/c_start.S for details.
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config HAVE_DEBUG_RAM_SETUP
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config HAVE_DEBUG_RAM_SETUP
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def_bool n
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def_bool n
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@ -740,7 +740,7 @@ config LLSHELL
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help
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help
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If enabled, you will have a low level shell to examine your machine.
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If enabled, you will have a low level shell to examine your machine.
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Put llshell() in your (romstage) code to start the shell.
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Put llshell() in your (romstage) code to start the shell.
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See src/arch/i386/llshell/llshell.inc for details.
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See src/arch/x86/llshell/llshell.inc for details.
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endmenu
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endmenu
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@ -1 +0,0 @@
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# If you add something to this file, enable it in src/arch/i386/Makefile.inc first.
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@ -26,7 +26,7 @@ $(obj)/mainboard/$(MAINBOARDDIR)/crt0.romstage.o: $(obj)/mainboard/$(MAINBOARDDI
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$(obj)/mainboard/$(MAINBOARDDIR)/crt0.s: $(obj)/crt0.S
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$(obj)/mainboard/$(MAINBOARDDIR)/crt0.s: $(obj)/crt0.S
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@printf " CC $(subst $(obj)/,,$(@))\n"
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC) -MMD -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/i386/include -I$(obj) -include $(obj)/config.h -I. -I$(src) $< -o $@
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$(CC) -MMD -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -I. -I$(src) $< -o $@
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$(obj)/coreboot: $$(romstage-objs) $(obj)/ldscript.ld
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$(obj)/coreboot: $$(romstage-objs) $(obj)/ldscript.ld
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@printf " LINK $(subst $(obj)/,,$(@))\n"
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@printf " LINK $(subst $(obj)/,,$(@))\n"
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@ -23,24 +23,24 @@ $(obj)/coreboot.bootblock: $(obj)/bootblock.elf
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@printf " OBJCOPY $(subst $(obj)/,,$(@))\n"
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@printf " OBJCOPY $(subst $(obj)/,,$(@))\n"
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$(OBJCOPY) -O binary $< $@
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$(OBJCOPY) -O binary $< $@
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bootblock_lds = $(src)/arch/i386/init/ldscript_failover.lb
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bootblock_lds = $(src)/arch/x86/init/ldscript_failover.lb
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bootblock_lds += $(src)/cpu/x86/16bit/entry16.lds
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bootblock_lds += $(src)/cpu/x86/16bit/entry16.lds
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bootblock_lds += $(src)/cpu/x86/16bit/reset16.lds
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bootblock_lds += $(src)/cpu/x86/16bit/reset16.lds
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bootblock_lds += $(src)/arch/i386/lib/id.lds
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bootblock_lds += $(src)/arch/x86/lib/id.lds
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bootblock_lds += $(chipset_bootblock_lds)
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bootblock_lds += $(chipset_bootblock_lds)
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bootblock_inc = $(src)/arch/i386/init/prologue.inc
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bootblock_inc = $(src)/arch/x86/init/prologue.inc
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bootblock_inc += $(src)/cpu/x86/16bit/entry16.inc
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bootblock_inc += $(src)/cpu/x86/16bit/entry16.inc
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bootblock_inc += $(src)/cpu/x86/16bit/reset16.inc
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bootblock_inc += $(src)/cpu/x86/16bit/reset16.inc
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bootblock_inc += $(src)/cpu/x86/32bit/entry32.inc
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bootblock_inc += $(src)/cpu/x86/32bit/entry32.inc
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bootblock_inc += $(src)/arch/i386/lib/id.inc
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bootblock_inc += $(src)/arch/x86/lib/id.inc
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bootblock_inc += $(chipset_bootblock_inc)
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bootblock_inc += $(chipset_bootblock_inc)
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ifeq ($(CONFIG_SSE),y)
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ifeq ($(CONFIG_SSE),y)
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bootblock_inc += $(src)/cpu/x86/sse_enable.inc
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bootblock_inc += $(src)/cpu/x86/sse_enable.inc
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endif
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endif
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bootblock_inc += $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc
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bootblock_inc += $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc
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bootblock_inc += $(src)/arch/i386/lib/walkcbfs.S
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bootblock_inc += $(src)/arch/x86/lib/walkcbfs.S
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bootblock_romccflags := -mcpu=i386 -O2 -D__PRE_RAM__
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bootblock_romccflags := -mcpu=i386 -O2 -D__PRE_RAM__
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ifeq ($(CONFIG_SSE),y)
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ifeq ($(CONFIG_SSE),y)
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@ -63,9 +63,9 @@ $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o: $(obj)/mainboard/$(MAINBOARDDIR)/b
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$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.s: $(obj)/bootblock/bootblock.S
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$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.s: $(obj)/bootblock/bootblock.S
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@printf " CC $(subst $(obj)/,,$(@))\n"
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC) -MMD -DASSEMBLY -E -I$(src)/include -I$(src)/arch/i386/include -I$(obj) -I$(obj)/bootblock -include $(obj)/config.h -I. -I$(src) $< -o $@
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$(CC) -MMD -DASSEMBLY -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -I$(obj)/bootblock -include $(obj)/config.h -I. -I$(src) $< -o $@
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$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(src)/arch/i386/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc
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$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc
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@printf " ROMCC $(subst $(obj)/,,$(@))\n"
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@printf " ROMCC $(subst $(obj)/,,$(@))\n"
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$(CC) -MM -MT$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc \
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$(CC) -MM -MT$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc \
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$< > $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc.d
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$< > $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc.d
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@ -113,5 +113,5 @@ $(obj)/mainboard/$(MAINBOARDDIR)/crt0.romstage.o: $(obj)/mainboard/$(MAINBOARDDI
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$(obj)/mainboard/$(MAINBOARDDIR)/crt0.s: $(obj)/romstage/crt0.S
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$(obj)/mainboard/$(MAINBOARDDIR)/crt0.s: $(obj)/romstage/crt0.S
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@printf " CC $(subst $(obj)/,,$(@))\n"
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC) -MMD -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/i386/include -I$(obj) -I$(obj)/romstage -include $(obj)/config.h -I. -I$(src) $< -o $@
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$(CC) -MMD -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -I$(obj)/romstage -include $(obj)/config.h -I. -I$(src) $< -o $@
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@ -107,17 +107,17 @@ $(objutil)/options/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src
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#######################################################################
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#######################################################################
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# Build the coreboot_ram (stage 2)
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# Build the coreboot_ram (stage 2)
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$(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/i386/coreboot_ram.ld #ldoptions
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$(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/x86/coreboot_ram.ld #ldoptions
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@printf " CC $(subst $(obj)/,,$(@))\n"
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/i386/coreboot_ram.ld $(obj)/coreboot_ram.o
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$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/coreboot_ram.ld $(obj)/coreboot_ram.o
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$(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
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$(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
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$(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ram.debug
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$(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ram.debug
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$(OBJCOPY) --strip-debug $@
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$(OBJCOPY) --strip-debug $@
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$(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ram.debug $@
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$(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ram.debug $@
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$(obj)/coreboot_ram.o: $(obj)/arch/i386/lib/c_start.ramstage.o $$(driver-objs) $(obj)/coreboot.a $(LIBGCC_FILE_NAME)
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$(obj)/coreboot_ram.o: $(obj)/arch/x86/lib/c_start.ramstage.o $$(driver-objs) $(obj)/coreboot.a $(LIBGCC_FILE_NAME)
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@printf " CC $(subst $(obj)/,,$(@))\n"
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC) -nostdlib -r -o $@ $(obj)/arch/i386/lib/c_start.ramstage.o $(driver-objs) -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,--end-group
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$(CC) -nostdlib -r -o $@ $(obj)/arch/x86/lib/c_start.ramstage.o $(driver-objs) -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,--end-group
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$(obj)/coreboot.a: $$(ramstage-objs)
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$(obj)/coreboot.a: $$(ramstage-objs)
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@printf " AR $(subst $(obj)/,,$(@))\n"
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@printf " AR $(subst $(obj)/,,$(@))\n"
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@ -131,7 +131,7 @@ ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
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$(obj)/coreboot_ap: $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o
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$(obj)/coreboot_ap: $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o
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@printf " CC $(subst $(obj)/,,$(@))\n"
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/i386/init/ldscript_apc.lb $^
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$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/init/ldscript_apc.lb $^
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$(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ap.debug
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$(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ap.debug
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$(OBJCOPY) --strip-debug $@
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$(OBJCOPY) --strip-debug $@
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$(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ap.debug $@
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$(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ap.debug $@
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@ -143,9 +143,9 @@ endif
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#######################################################################
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#######################################################################
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# done
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# done
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crt0s = $(src)/arch/i386/init/prologue.inc
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crt0s = $(src)/arch/x86/init/prologue.inc
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ldscripts =
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ldscripts =
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ldscripts += $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
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ldscripts += $(src)/arch/x86/init/ldscript_fallback_cbfs.lb
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ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
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ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
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crt0s += $(src)/cpu/x86/16bit/entry16.inc
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crt0s += $(src)/cpu/x86/16bit/entry16.inc
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ldscripts += $(src)/cpu/x86/16bit/entry16.lds
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ldscripts += $(src)/cpu/x86/16bit/entry16.lds
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@ -155,8 +155,8 @@ ldscripts += $(src)/cpu/x86/32bit/entry32.lds
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ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
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ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
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crt0s += $(src)/cpu/x86/16bit/reset16.inc
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crt0s += $(src)/cpu/x86/16bit/reset16.inc
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ldscripts += $(src)/cpu/x86/16bit/reset16.lds
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ldscripts += $(src)/cpu/x86/16bit/reset16.lds
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crt0s += $(src)/arch/i386/lib/id.inc
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crt0s += $(src)/arch/x86/lib/id.inc
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ldscripts += $(src)/arch/i386/lib/id.lds
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ldscripts += $(src)/arch/x86/lib/id.lds
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||||||
endif
|
endif
|
||||||
|
|
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crt0s += $(src)/cpu/x86/fpu_enable.inc
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crt0s += $(src)/cpu/x86/fpu_enable.inc
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@ -174,7 +174,7 @@ crt0s += $(src)/cpu/intel/car/cache_as_ram.inc
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endif
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endif
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|
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ifeq ($(CONFIG_LLSHELL),y)
|
ifeq ($(CONFIG_LLSHELL),y)
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crt0s += $(src)/arch/i386/llshell/llshell.inc
|
crt0s += $(src)/arch/x86/llshell/llshell.inc
|
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endif
|
endif
|
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|
|
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crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
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crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
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@ -192,7 +192,7 @@ ldscripts += $(chipset_bootblock_lds)
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endif
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endif
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ifeq ($(CONFIG_ROMCC),y)
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ifeq ($(CONFIG_ROMCC),y)
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crt0s += $(src)/arch/i386/init/crt0_romcc_epilogue.inc
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crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc
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endif
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endif
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|
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ifeq ($(CONFIG_ROMCC),y)
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ifeq ($(CONFIG_ROMCC),y)
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@ -251,7 +251,7 @@ ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c
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endif
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endif
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|
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ifeq ($(CONFIG_TINY_BOOTBLOCK),y)
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ifeq ($(CONFIG_TINY_BOOTBLOCK),y)
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include $(src)/arch/i386/Makefile.bootblock.inc
|
include $(src)/arch/x86/Makefile.bootblock.inc
|
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else
|
else
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include $(src)/arch/i386/Makefile.bigbootblock.inc
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include $(src)/arch/x86/Makefile.bigbootblock.inc
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||||||
endif
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endif
|
|
@ -9,5 +9,5 @@ ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c
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ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpigen.c
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ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpigen.c
|
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ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S
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ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S
|
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|
|
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$(obj)/arch/i386/boot/coreboot_table.ramstage.o : $(OPTION_TABLE_H)
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$(obj)/arch/x86/boot/coreboot_table.ramstage.o : $(OPTION_TABLE_H)
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||||||
|
|
|
@ -0,0 +1 @@
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||||||
|
# If you add something to this file, enable it in src/arch/x86/Makefile.inc first.
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|
@ -10,4 +10,4 @@ ramstage-$(CONFIG_IOAPIC) += ioapic.c
|
||||||
romstage-y += printk_init.c
|
romstage-y += printk_init.c
|
||||||
romstage-y += cbfs_and_run.c
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romstage-y += cbfs_and_run.c
|
||||||
|
|
||||||
$(obj)/arch/i386/lib/console.ramstage.o :: $(obj)/build.h
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$(obj)/arch/x86/lib/console.ramstage.o :: $(obj)/build.h
|
|
@ -213,7 +213,7 @@ static struct device_operations cpu_dev_ops = {
|
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.init = model_c7_init,
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.init = model_c7_init,
|
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};
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};
|
||||||
|
|
||||||
/* Look in arch/i386/lib/cpu.c:cpu_initialize. If there is no CPU with an exact
|
/* Look in arch/x86/lib/cpu.c:cpu_initialize. If there is no CPU with an exact
|
||||||
* ID, the cpu mask (stepping) is masked out and the check is repeated. This
|
* ID, the cpu mask (stepping) is masked out and the check is repeated. This
|
||||||
* allows us to keep the table significantly smaller.
|
* allows us to keep the table significantly smaller.
|
||||||
*/
|
*/
|
||||||
|
|
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@ -32,7 +32,7 @@ unsigned long log2(unsigned long x);
|
||||||
/* Defined in src/lib/lzma.c */
|
/* Defined in src/lib/lzma.c */
|
||||||
unsigned long ulzma(unsigned char *src, unsigned char *dst);
|
unsigned long ulzma(unsigned char *src, unsigned char *dst);
|
||||||
|
|
||||||
/* Defined in src/arch/i386/boot/gdt.c */
|
/* Defined in src/arch/x86/boot/gdt.c */
|
||||||
void move_gdt(void);
|
void move_gdt(void);
|
||||||
|
|
||||||
/* Defined in src/lib/ramtest.c */
|
/* Defined in src/lib/ramtest.c */
|
||||||
|
|
|
@ -27,7 +27,7 @@ DefinitionBlock (
|
||||||
0x00010001 /* OEM Revision */
|
0x00010001 /* OEM Revision */
|
||||||
)
|
)
|
||||||
{ /* Start of ASL file */
|
{ /* Start of ASL file */
|
||||||
/* #include "../../../arch/i386/acpi/debug.asl" */ /* Include global debug methods if needed */
|
/* #include "../../../arch/x86/acpi/debug.asl" */ /* Include global debug methods if needed */
|
||||||
|
|
||||||
/* Data to be patched by the BIOS during POST */
|
/* Data to be patched by the BIOS during POST */
|
||||||
/* FIXME the patching is not done yet! */
|
/* FIXME the patching is not done yet! */
|
||||||
|
@ -1123,7 +1123,7 @@ DefinitionBlock (
|
||||||
|
|
||||||
/* South Bridge */
|
/* South Bridge */
|
||||||
Scope(\_SB) { /* Start \_SB scope */
|
Scope(\_SB) { /* Start \_SB scope */
|
||||||
#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
||||||
|
|
||||||
/* _SB.PCI0 */
|
/* _SB.PCI0 */
|
||||||
/* Note: Only need HID on Primary Bus */
|
/* Note: Only need HID on Primary Bus */
|
||||||
|
|
|
@ -27,7 +27,7 @@ DefinitionBlock (
|
||||||
0x00010001 /* OEM Revision */
|
0x00010001 /* OEM Revision */
|
||||||
)
|
)
|
||||||
{ /* Start of ASL file */
|
{ /* Start of ASL file */
|
||||||
/* #include "../../../arch/i386/acpi/debug.asl" */ /* Include global debug methods if needed */
|
/* #include "../../../arch/x86/acpi/debug.asl" */ /* Include global debug methods if needed */
|
||||||
|
|
||||||
/* Data to be patched by the BIOS during POST */
|
/* Data to be patched by the BIOS during POST */
|
||||||
/* FIXME the patching is not done yet! */
|
/* FIXME the patching is not done yet! */
|
||||||
|
@ -1120,7 +1120,7 @@ DefinitionBlock (
|
||||||
|
|
||||||
/* South Bridge */
|
/* South Bridge */
|
||||||
Scope(\_SB) { /* Start \_SB scope */
|
Scope(\_SB) { /* Start \_SB scope */
|
||||||
#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
||||||
|
|
||||||
/* _SB.PCI0 */
|
/* _SB.PCI0 */
|
||||||
/* Note: Only need HID on Primary Bus */
|
/* Note: Only need HID on Primary Bus */
|
||||||
|
|
|
@ -27,7 +27,7 @@ DefinitionBlock (
|
||||||
0x00010001 /* OEM Revision */
|
0x00010001 /* OEM Revision */
|
||||||
)
|
)
|
||||||
{ /* Start of ASL file */
|
{ /* Start of ASL file */
|
||||||
/* #include "../../../arch/i386/acpi/debug.asl" */ /* Include global debug methods if needed */
|
/* #include "../../../arch/x86/acpi/debug.asl" */ /* Include global debug methods if needed */
|
||||||
|
|
||||||
/* Data to be patched by the BIOS during POST */
|
/* Data to be patched by the BIOS during POST */
|
||||||
/* FIXME the patching is not done yet! */
|
/* FIXME the patching is not done yet! */
|
||||||
|
@ -1162,7 +1162,7 @@ DefinitionBlock (
|
||||||
|
|
||||||
/* South Bridge */
|
/* South Bridge */
|
||||||
Scope(\_SB) { /* Start \_SB scope */
|
Scope(\_SB) { /* Start \_SB scope */
|
||||||
#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
||||||
|
|
||||||
/* _SB.PCI0 */
|
/* _SB.PCI0 */
|
||||||
/* Note: Only need HID on Primary Bus */
|
/* Note: Only need HID on Primary Bus */
|
||||||
|
|
|
@ -27,7 +27,7 @@ DefinitionBlock (
|
||||||
0x00010001 /* OEM Revision */
|
0x00010001 /* OEM Revision */
|
||||||
)
|
)
|
||||||
{ /* Start of ASL file */
|
{ /* Start of ASL file */
|
||||||
/* #include "../../../arch/i386/acpi/debug.asl" */ /* Include global debug methods if needed */
|
/* #include "../../../arch/x86/acpi/debug.asl" */ /* Include global debug methods if needed */
|
||||||
|
|
||||||
/* Data to be patched by the BIOS during POST */
|
/* Data to be patched by the BIOS during POST */
|
||||||
/* FIXME the patching is not done yet! */
|
/* FIXME the patching is not done yet! */
|
||||||
|
@ -1122,7 +1122,7 @@ DefinitionBlock (
|
||||||
|
|
||||||
/* South Bridge */
|
/* South Bridge */
|
||||||
Scope(\_SB) { /* Start \_SB scope */
|
Scope(\_SB) { /* Start \_SB scope */
|
||||||
#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
||||||
|
|
||||||
/* _SB.PCI0 */
|
/* _SB.PCI0 */
|
||||||
/* Note: Only need HID on Primary Bus */
|
/* Note: Only need HID on Primary Bus */
|
||||||
|
|
|
@ -12,7 +12,7 @@
|
||||||
#include <cpu/x86/lapic.h>
|
#include <cpu/x86/lapic.h>
|
||||||
#include <pc80/mc146818rtc.h>
|
#include <pc80/mc146818rtc.h>
|
||||||
#include "pc80/serial.c"
|
#include "pc80/serial.c"
|
||||||
#include "./arch/i386/lib/printk_init.c"
|
#include "./arch/x86/lib/printk_init.c"
|
||||||
|
|
||||||
#include "console/console.c"
|
#include "console/console.c"
|
||||||
#include "lib/uart8250.c"
|
#include "lib/uart8250.c"
|
||||||
|
|
|
@ -27,7 +27,7 @@ DefinitionBlock (
|
||||||
0x00010001 /* OEM Revision */
|
0x00010001 /* OEM Revision */
|
||||||
)
|
)
|
||||||
{ /* Start of ASL file */
|
{ /* Start of ASL file */
|
||||||
/* #include "../../../arch/i386/acpi/debug.asl" */ /* Include global debug methods if needed */
|
/* #include "../../../arch/x86/acpi/debug.asl" */ /* Include global debug methods if needed */
|
||||||
|
|
||||||
/* Data to be patched by the BIOS during POST */
|
/* Data to be patched by the BIOS during POST */
|
||||||
/* FIXME the patching is not done yet! */
|
/* FIXME the patching is not done yet! */
|
||||||
|
@ -1162,7 +1162,7 @@ DefinitionBlock (
|
||||||
|
|
||||||
/* South Bridge */
|
/* South Bridge */
|
||||||
Scope(\_SB) { /* Start \_SB scope */
|
Scope(\_SB) { /* Start \_SB scope */
|
||||||
#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
||||||
|
|
||||||
/* _SB.PCI0 */
|
/* _SB.PCI0 */
|
||||||
/* Note: Only need HID on Primary Bus */
|
/* Note: Only need HID on Primary Bus */
|
||||||
|
|
|
@ -27,7 +27,7 @@ DefinitionBlock (
|
||||||
0x00010001 /* OEM Revision */
|
0x00010001 /* OEM Revision */
|
||||||
)
|
)
|
||||||
{ /* Start of ASL file */
|
{ /* Start of ASL file */
|
||||||
/* #include "../../../arch/i386/acpi/debug.asl" */ /* Include global debug methods if needed */
|
/* #include "../../../arch/x86/acpi/debug.asl" */ /* Include global debug methods if needed */
|
||||||
#include "northbridge/amd/amdk8/util.asl"
|
#include "northbridge/amd/amdk8/util.asl"
|
||||||
|
|
||||||
Name(HPBA, 0xFED00000) /* Base address of HPET table */
|
Name(HPBA, 0xFED00000) /* Base address of HPET table */
|
||||||
|
@ -460,7 +460,7 @@ DefinitionBlock (
|
||||||
|
|
||||||
/* South Bridge */
|
/* South Bridge */
|
||||||
Scope(\_SB) { /* Start \_SB scope */
|
Scope(\_SB) { /* Start \_SB scope */
|
||||||
#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
||||||
|
|
||||||
/* _SB.PCI0 */
|
/* _SB.PCI0 */
|
||||||
/* Note: Only need HID on Primary Bus */
|
/* Note: Only need HID on Primary Bus */
|
||||||
|
|
|
@ -27,7 +27,7 @@ DefinitionBlock (
|
||||||
0x00010001 /* OEM Revision */
|
0x00010001 /* OEM Revision */
|
||||||
)
|
)
|
||||||
{ /* Start of ASL file */
|
{ /* Start of ASL file */
|
||||||
/* #include "../../../arch/i386/acpi/debug.asl" */ /* Include global debug methods if needed */
|
/* #include "../../../arch/x86/acpi/debug.asl" */ /* Include global debug methods if needed */
|
||||||
|
|
||||||
/* Data to be patched by the BIOS during POST */
|
/* Data to be patched by the BIOS during POST */
|
||||||
/* FIXME the patching is not done yet! */
|
/* FIXME the patching is not done yet! */
|
||||||
|
@ -1162,7 +1162,7 @@ DefinitionBlock (
|
||||||
|
|
||||||
/* South Bridge */
|
/* South Bridge */
|
||||||
Scope(\_SB) { /* Start \_SB scope */
|
Scope(\_SB) { /* Start \_SB scope */
|
||||||
#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
||||||
|
|
||||||
/* _SB.PCI0 */
|
/* _SB.PCI0 */
|
||||||
/* Note: Only need HID on Primary Bus */
|
/* Note: Only need HID on Primary Bus */
|
||||||
|
|
|
@ -27,7 +27,7 @@ DefinitionBlock (
|
||||||
0x00010001 /* OEM Revision */
|
0x00010001 /* OEM Revision */
|
||||||
)
|
)
|
||||||
{ /* Start of ASL file */
|
{ /* Start of ASL file */
|
||||||
/* #include "../../../arch/i386/acpi/debug.asl" */ /* Include global debug methods if needed */
|
/* #include "../../../arch/x86/acpi/debug.asl" */ /* Include global debug methods if needed */
|
||||||
|
|
||||||
/* Data to be patched by the BIOS during POST */
|
/* Data to be patched by the BIOS during POST */
|
||||||
/* FIXME the patching is not done yet! */
|
/* FIXME the patching is not done yet! */
|
||||||
|
@ -1162,7 +1162,7 @@ DefinitionBlock (
|
||||||
|
|
||||||
/* South Bridge */
|
/* South Bridge */
|
||||||
Scope(\_SB) { /* Start \_SB scope */
|
Scope(\_SB) { /* Start \_SB scope */
|
||||||
#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
||||||
|
|
||||||
/* _SB.PCI0 */
|
/* _SB.PCI0 */
|
||||||
/* Note: Only need HID on Primary Bus */
|
/* Note: Only need HID on Primary Bus */
|
||||||
|
|
|
@ -142,7 +142,7 @@ static inline void bmc_foad(void)
|
||||||
|
|
||||||
/* end IPMI garbage */
|
/* end IPMI garbage */
|
||||||
|
|
||||||
#include "arch/i386/lib/stages.c"
|
#include "arch/x86/lib/stages.c"
|
||||||
|
|
||||||
static void main(unsigned long bist)
|
static void main(unsigned long bist)
|
||||||
{
|
{
|
||||||
|
|
|
@ -37,7 +37,7 @@
|
||||||
#include "pc80/serial.c"
|
#include "pc80/serial.c"
|
||||||
|
|
||||||
#include "lib/uart8250.c"
|
#include "lib/uart8250.c"
|
||||||
#include "arch/i386/lib/printk_init.c"
|
#include "arch/x86/lib/printk_init.c"
|
||||||
#include "console/vtxprintf.c"
|
#include "console/vtxprintf.c"
|
||||||
#include "console/console.c"
|
#include "console/console.c"
|
||||||
|
|
||||||
|
|
|
@ -35,7 +35,7 @@
|
||||||
#include "pc80/serial.c"
|
#include "pc80/serial.c"
|
||||||
|
|
||||||
#include "lib/uart8250.c"
|
#include "lib/uart8250.c"
|
||||||
#include "arch/i386/lib/printk_init.c"
|
#include "arch/x86/lib/printk_init.c"
|
||||||
#include "console/vtxprintf.c"
|
#include "console/vtxprintf.c"
|
||||||
#include "console/console.c"
|
#include "console/console.c"
|
||||||
|
|
||||||
|
|
|
@ -27,7 +27,7 @@ DefinitionBlock (
|
||||||
0x00010001 /* OEM Revision */
|
0x00010001 /* OEM Revision */
|
||||||
)
|
)
|
||||||
{ /* Start of ASL file */
|
{ /* Start of ASL file */
|
||||||
/* #include "../../../arch/i386/acpi/debug.asl" */ /* Include global debug methods if needed */
|
/* #include "../../../arch/x86/acpi/debug.asl" */ /* Include global debug methods if needed */
|
||||||
|
|
||||||
/* Data to be patched by the BIOS during POST */
|
/* Data to be patched by the BIOS during POST */
|
||||||
/* FIXME the patching is not done yet! */
|
/* FIXME the patching is not done yet! */
|
||||||
|
@ -1162,7 +1162,7 @@ DefinitionBlock (
|
||||||
|
|
||||||
/* South Bridge */
|
/* South Bridge */
|
||||||
Scope(\_SB) { /* Start \_SB scope */
|
Scope(\_SB) { /* Start \_SB scope */
|
||||||
#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
||||||
|
|
||||||
/* _SB.PCI0 */
|
/* _SB.PCI0 */
|
||||||
/* Note: Only need HID on Primary Bus */
|
/* Note: Only need HID on Primary Bus */
|
||||||
|
|
|
@ -27,7 +27,7 @@ DefinitionBlock (
|
||||||
0x00010001 /* OEM Revision */
|
0x00010001 /* OEM Revision */
|
||||||
)
|
)
|
||||||
{ /* Start of ASL file */
|
{ /* Start of ASL file */
|
||||||
/* #include "../../../arch/i386/acpi/debug.asl" */ /* Include global debug methods if needed */
|
/* #include "../../../arch/x86/acpi/debug.asl" */ /* Include global debug methods if needed */
|
||||||
|
|
||||||
/* Data to be patched by the BIOS during POST */
|
/* Data to be patched by the BIOS during POST */
|
||||||
/* FIXME the patching is not done yet! */
|
/* FIXME the patching is not done yet! */
|
||||||
|
@ -1162,7 +1162,7 @@ DefinitionBlock (
|
||||||
|
|
||||||
/* South Bridge */
|
/* South Bridge */
|
||||||
Scope(\_SB) { /* Start \_SB scope */
|
Scope(\_SB) { /* Start \_SB scope */
|
||||||
#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
||||||
|
|
||||||
/* _SB.PCI0 */
|
/* _SB.PCI0 */
|
||||||
/* Note: Only need HID on Primary Bus */
|
/* Note: Only need HID on Primary Bus */
|
||||||
|
|
|
@ -27,7 +27,7 @@ DefinitionBlock (
|
||||||
0x00010001 /* OEM Revision */
|
0x00010001 /* OEM Revision */
|
||||||
)
|
)
|
||||||
{ /* Start of ASL file */
|
{ /* Start of ASL file */
|
||||||
/* #include "../../../arch/i386/acpi/debug.asl" */ /* Include global debug methods if needed */
|
/* #include "../../../arch/x86/acpi/debug.asl" */ /* Include global debug methods if needed */
|
||||||
|
|
||||||
/* Data to be patched by the BIOS during POST */
|
/* Data to be patched by the BIOS during POST */
|
||||||
/* FIXME the patching is not done yet! */
|
/* FIXME the patching is not done yet! */
|
||||||
|
@ -1162,7 +1162,7 @@ DefinitionBlock (
|
||||||
|
|
||||||
/* South Bridge */
|
/* South Bridge */
|
||||||
Scope(\_SB) { /* Start \_SB scope */
|
Scope(\_SB) { /* Start \_SB scope */
|
||||||
#include "../../../arch/i386/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
#include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
|
||||||
|
|
||||||
/* _SB.PCI0 */
|
/* _SB.PCI0 */
|
||||||
/* Note: Only need HID on Primary Bus */
|
/* Note: Only need HID on Primary Bus */
|
||||||
|
|
|
@ -37,7 +37,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
|
||||||
#include "northbridge/intel/e7520/raminit.c"
|
#include "northbridge/intel/e7520/raminit.c"
|
||||||
#include "lib/generic_sdram.c"
|
#include "lib/generic_sdram.c"
|
||||||
#include "debug.c"
|
#include "debug.c"
|
||||||
#include "arch/i386/lib/stages.c"
|
#include "arch/x86/lib/stages.c"
|
||||||
|
|
||||||
static void main(unsigned long bist)
|
static void main(unsigned long bist)
|
||||||
{
|
{
|
||||||
|
|
|
@ -50,7 +50,7 @@ static inline int spd_read_byte(u16 device, u8 address)
|
||||||
#include "northbridge/intel/i3100/raminit.c"
|
#include "northbridge/intel/i3100/raminit.c"
|
||||||
#include "lib/generic_sdram.c"
|
#include "lib/generic_sdram.c"
|
||||||
#if 0 /* skip_romstage doesn't compile with gcc */
|
#if 0 /* skip_romstage doesn't compile with gcc */
|
||||||
#include "arch/i386/lib/stages.c"
|
#include "arch/x86/lib/stages.c"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
void main(unsigned long bist)
|
void main(unsigned long bist)
|
||||||
|
|
|
@ -48,7 +48,7 @@ static inline int spd_read_byte(u16 device, u8 address)
|
||||||
#include "northbridge/intel/i3100/raminit_ep80579.c"
|
#include "northbridge/intel/i3100/raminit_ep80579.c"
|
||||||
#include "lib/generic_sdram.c"
|
#include "lib/generic_sdram.c"
|
||||||
#include "../../intel/jarrell/debug.c"
|
#include "../../intel/jarrell/debug.c"
|
||||||
#include "arch/i386/lib/stages.c"
|
#include "arch/x86/lib/stages.c"
|
||||||
|
|
||||||
#define SERIAL_DEV PNP_DEV(0x4e, I3100_SP1)
|
#define SERIAL_DEV PNP_DEV(0x4e, I3100_SP1)
|
||||||
|
|
||||||
|
|
|
@ -31,7 +31,7 @@ const struct irq_routing_table intel_irq_routing_table = {
|
||||||
0xB1, // Checksum of the entire structure (causes 8-bit sum == 0)
|
0xB1, // Checksum of the entire structure (causes 8-bit sum == 0)
|
||||||
{
|
{
|
||||||
// NOTE: For 82801, a nonzero link value is a pointer to a PIRQ[n]_ROUT register in PCI configuration space
|
// NOTE: For 82801, a nonzero link value is a pointer to a PIRQ[n]_ROUT register in PCI configuration space
|
||||||
// This was determined from linux-2.6.11/arch/i386/pci/irq.c
|
// This was determined from linux-2.6.11/arch/x86/pci/irq.c
|
||||||
// bitmap of 0xdcf8 == routable to IRQ3-IRQ7, IRQ10-IRQ12, or IRQ14-IRQ15
|
// bitmap of 0xdcf8 == routable to IRQ3-IRQ7, IRQ10-IRQ12, or IRQ14-IRQ15
|
||||||
// ICH-3 doesn't allow SERIRQ or PCI message to generate IRQ0, IRQ2, IRQ8, or IRQ13
|
// ICH-3 doesn't allow SERIRQ or PCI message to generate IRQ0, IRQ2, IRQ8, or IRQ13
|
||||||
// Not sure why IRQ9 isn't routable (inherited from Tyan S2735)
|
// Not sure why IRQ9 isn't routable (inherited from Tyan S2735)
|
||||||
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue