mb/google/volteer: Create copano variant

Create the copano variant of the volteer reference board by
copying the template files to a new directory named for the variant.

(Auto-Generated by create_coreboot_variant.sh version 4.3.1).

BUG=b:174413884
BRANCH=None
TEST=util/abuild/abuild -p none -t google/volteer -x -a
make sure the build includes GOOGLE_COPANO

Signed-off-by: FrankChu <frank_chu@pegatron.corp-partner.google.com>
Change-Id: Ib06625f492f68a6a6f5c6b382772b68f1eb681ef
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48136
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
This commit is contained in:
FrankChu 2020-11-30 12:56:42 +08:00 committed by Patrick Georgi
parent 40beb36f07
commit 86a241e90c
6 changed files with 39 additions and 0 deletions

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@ -107,6 +107,7 @@ config MAINBOARD_PART_NUMBER
default "Elemi" if BOARD_GOOGLE_ELEMI
default "Voema" if BOARD_GOOGLE_VOEMA
default "Drobit" if BOARD_GOOGLE_DROBIT
default "Copano" if BOARD_GOOGLE_COPANO
config MAX_CPUS
int
@ -148,6 +149,7 @@ config VARIANT_DIR
default "elemi" if BOARD_GOOGLE_ELEMI
default "voema" if BOARD_GOOGLE_VOEMA
default "drobit" if BOARD_GOOGLE_DROBIT
default "copano" if BOARD_GOOGLE_COPANO
config VARIANT_HAS_MIPI_CAMERA
bool

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@ -93,3 +93,7 @@ config BOARD_GOOGLE_VOEMA
config BOARD_GOOGLE_DROBIT
bool "-> Drobit"
select BOARD_GOOGLE_BASEBOARD_VOLTEER
config BOARD_GOOGLE_COPANO
bool "-> Copano"
select BOARD_GOOGLE_BASEBOARD_VOLTEER

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@ -0,0 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef __VARIANT_EC_H__
#define __VARIANT_EC_H__
#include <baseboard/ec.h>
#endif

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@ -0,0 +1,15 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef VARIANT_GPIO_H
#define VARIANT_GPIO_H
#include <baseboard/gpio.h>
/* Memory configuration board straps */
/* Copied from baseboard and may need to change for the new variant. */
#define GPIO_MEM_CONFIG_0 GPP_C12
#define GPIO_MEM_CONFIG_1 GPP_C15
#define GPIO_MEM_CONFIG_2 GPP_C14
#define GPIO_MEM_CONFIG_3 GPP_D15
#endif

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@ -0,0 +1,4 @@
# This is a CSV file containing a list of memory parts used by this variant.
# Generate an updated Makefile.inc and dram_id.generated.txt by running the
# gen_part_id tool from util/spd_tools/ddr4 or util/spd_tools/lp4x
# See util/spd_tools/{ddr4,lp4x}/README.md for more details and instructions.

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@ -0,0 +1,6 @@
chip soc/intel/tigerlake
device domain 0 on
end
end