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include/console: Fix FSP Notify phase postcodes discrepancy 

List of changes:
1. Make the FSP notify phases name prior in comments section.
2. Fix discrepancies in FSP notify before and after postcode comments.
3. Add FSP notify postcode macros for after pci enumeration(0xa2)
and ready to boot(0xa3) call.

Change-Id: Ib4c825d5f1f31f80ad2a03ff5d6006daa7104d23
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52894
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2021-05-04 23:43:34 +05:30
parent 8d2b0dcc44
commit 86b1b6811c
2 changed files with 24 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/drivers/intel/fsp2_0/notify.c
View File

@ -38,10 +38,10 @@ static void fsp_notify(enum fsp_notify_phase phase)
if (phase == AFTER_PCI_ENUM) { if (phase == AFTER_PCI_ENUM) {
timestamp_add_now(TS_FSP_AFTER_ENUMERATE); timestamp_add_now(TS_FSP_AFTER_ENUMERATE);
post_code(POST_FSP_NOTIFY_BEFORE_ENUMERATE); post_code(POST_FSP_NOTIFY_AFTER_ENUMERATE);
} else if (phase == READY_TO_BOOT) { } else if (phase == READY_TO_BOOT) {
timestamp_add_now(TS_FSP_AFTER_FINALIZE); timestamp_add_now(TS_FSP_AFTER_FINALIZE);
post_code(POST_FSP_NOTIFY_BEFORE_FINALIZE); post_code(POST_FSP_NOTIFY_AFTER_FINALIZE);
} else if (phase == END_OF_FIRMWARE) { } else if (phase == END_OF_FIRMWARE) {
timestamp_add_now(TS_FSP_AFTER_END_OF_FIRMWARE); timestamp_add_now(TS_FSP_AFTER_END_OF_FIRMWARE);
post_code(POST_FSP_NOTIFY_AFTER_END_OF_FIRMWARE); post_code(POST_FSP_NOTIFY_AFTER_END_OF_FIRMWARE);

30
src/include/console/post_codes.h
View File

@ -204,16 +204,16 @@
#define POST_BS_PAYLOAD_BOOT 0x7b #define POST_BS_PAYLOAD_BOOT 0x7b
/** /**
* \brief Before calling FSP Notify before End of Firmware * \brief Before calling FSP Notify (end of firmware)
* *
* Going to call into FSP binary for Notify phase * Going to call into FSP binary for Notify phase (end of firmware)
*/ */
#define POST_FSP_NOTIFY_BEFORE_END_OF_FIRMWARE 0x88 #define POST_FSP_NOTIFY_BEFORE_END_OF_FIRMWARE 0x88
/** /**
* \brief Before calling FSP Notify after End of Firmware * \brief After calling FSP Notify (end of firmware)
* *
* Going to call into FSP binary for Notify phase * Going to call into FSP binary for Notify phase (end of firmware)
*/ */
#define POST_FSP_NOTIFY_AFTER_END_OF_FIRMWARE 0x89 #define POST_FSP_NOTIFY_AFTER_END_OF_FIRMWARE 0x89
@ -246,16 +246,16 @@
#define POST_FSP_SILICON_INIT 0x93 #define POST_FSP_SILICON_INIT 0x93
/** /**
* \brief Before calling FSP Notify before resource allocation * \brief Before calling FSP Notify (after PCI enumeration)
* *
* Going to call into FSP binary for Notify phase * Going to call into FSP binary for Notify phase (after PCI enumeration)
*/ */
#define POST_FSP_NOTIFY_BEFORE_ENUMERATE 0x94 #define POST_FSP_NOTIFY_BEFORE_ENUMERATE 0x94
/** /**
* \brief Before calling FSP Notify before finalize * \brief Before calling FSP Notify (ready to boot)
* *
* Going to call into FSP binary for Notify phase * Going to call into FSP binary for Notify phase (ready to boot)
*/ */
#define POST_FSP_NOTIFY_BEFORE_FINALIZE 0x95 #define POST_FSP_NOTIFY_BEFORE_FINALIZE 0x95
@ -301,6 +301,20 @@
*/ */
#define POST_FSP_MULTI_PHASE_SI_INIT_EXIT 0xa1 #define POST_FSP_MULTI_PHASE_SI_INIT_EXIT 0xa1
/**
* \brief After calling FSP Notify (after PCI enumeration)
*
* Going to call into FSP binary for Notify phase (after PCI enumeration)
*/
#define POST_FSP_NOTIFY_AFTER_ENUMERATE 0xa2
/**
* \brief After calling FSP Notify (ready to boot)
*
* Going to call into FSP binary for Notify phase (ready to boot)
*/
#define POST_FSP_NOTIFY_AFTER_FINALIZE 0xa3
/** /**
* \brief Invalid or corrupt ROM * \brief Invalid or corrupt ROM
* *