diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig
index cf9ba944e6..545b4232f2 100644
--- a/src/soc/intel/xeon_sp/Kconfig
+++ b/src/soc/intel/xeon_sp/Kconfig
@@ -17,6 +17,7 @@ config SOC_INTEL_COOPERLAKE_SP
 	bool
 	select XEON_SP_COMMON_BASE
 	select PLATFORM_USES_FSP2_2
+	select CACHE_MRC_SETTINGS
 	help
 	  Intel Cooperlake-SP support
 
diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig
index dcbadf8aab..8e7e6f1094 100644
--- a/src/soc/intel/xeon_sp/cpx/Kconfig
+++ b/src/soc/intel/xeon_sp/cpx/Kconfig
@@ -76,8 +76,6 @@ config CPU_BCLK_MHZ
 	int
 	default 100
 
-select CACHE_MRC_SETTINGS
-
 # CPX-SP has 2 IMCs, 3 channels per IMC, 2 DIMMs per channel
 # Default value is set to one socket, full config.
 config DIMM_MAX