mb/google/dedede/var/cappy2: Configure I2C times for tp & codec

Configure I2C high / low time in the device tree to ensure I2C
CLK runs accurately between 380 kHz and 400 kHz.

Measured I2C frequency just as below after tuning:
touchpad:390kHz
codec:395.8kHz

BUG=b:199481261
BRANCH=dedede
TEST=Build and check after tuning I2C clock is between 380 kHz and 400 kHz

Signed-off-by: Sunwei Li <lisunwei@huaqin.corp-partner.google.com>
Change-Id: Ifadc3d19eb57fe6f67504be154c30df7bc0fee71
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57551
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Sunwei Li 2021-09-10 15:36:32 +08:00 committed by Felix Held
parent a90acbd6dd
commit 86f0df4ca2
1 changed files with 4 additions and 0 deletions

View File

@ -22,6 +22,8 @@ chip soc/intel/jasperlake
register "common_soc_config" = "{ register "common_soc_config" = "{
.i2c[0] = { .i2c[0] = {
.speed = I2C_SPEED_FAST, .speed = I2C_SPEED_FAST,
.rise_time_ns = 255,
.fall_time_ns = 14,
}, },
.i2c[1] = { .i2c[1] = {
.speed = I2C_SPEED_FAST, .speed = I2C_SPEED_FAST,
@ -34,6 +36,8 @@ chip soc/intel/jasperlake
}, },
.i2c[4] = { .i2c[4] = {
.speed = I2C_SPEED_FAST, .speed = I2C_SPEED_FAST,
.rise_time_ns = 105,
.fall_time_ns = 4,
}, },
}" }"