cpu: Get rid of CPU_SPECIFIC_OPTIONS
Remove dummy CPU_SPECIFIC_OPTIONS. Change-Id: I267b2a7c6dfc887b572e1b63b0f59fbfa4d20f0e Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76681 Reviewed-by: Martin L Roth <gaumless@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -1,11 +1,6 @@
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config CPU_INTEL_HASWELL
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bool
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if CPU_INTEL_HASWELL
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config CPU_SPECIFIC_OPTIONS
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def_bool y
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select ARCH_X86
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select SSE2
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select UDELAY_TSC
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@ -19,6 +14,8 @@ config CPU_SPECIFIC_OPTIONS
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select HAVE_ASAN_IN_ROMSTAGE
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select CPU_INTEL_COMMON_VOLTAGE
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if CPU_INTEL_HASWELL
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config SMM_TSEG_SIZE
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hex
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default 0x800000
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@ -1,10 +1,5 @@
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config CPU_INTEL_MODEL_2065X
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bool
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if CPU_INTEL_MODEL_2065X
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config CPU_SPECIFIC_OPTIONS
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def_bool y
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select HAVE_EXP_X86_64_SUPPORT
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select ARCH_X86
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select SSE2
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@ -16,6 +11,8 @@ config CPU_SPECIFIC_OPTIONS
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select CPU_INTEL_COMMON
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select CPU_INTEL_COMMON_TIMEBASE
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if CPU_INTEL_MODEL_2065X
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config SMM_TSEG_SIZE
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hex
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default 0x800000
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@ -1,10 +1,5 @@
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config CPU_INTEL_MODEL_206AX
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bool
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if CPU_INTEL_MODEL_206AX
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config CPU_SPECIFIC_OPTIONS
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def_bool y
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select ARCH_X86
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select HAVE_EXP_X86_64_SUPPORT if USE_NATIVE_RAMINIT
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select SSE2
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@ -16,6 +11,8 @@ config CPU_SPECIFIC_OPTIONS
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select CPU_INTEL_COMMON
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select CPU_INTEL_COMMON_TIMEBASE
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if CPU_INTEL_MODEL_206AX
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config SMM_TSEG_SIZE
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hex
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default 0x800000
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@ -2,11 +2,6 @@
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config CPU_INTEL_SLOT_1
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bool
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if CPU_INTEL_SLOT_1
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config SLOT_SPECIFIC_OPTIONS
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def_bool y
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select CPU_INTEL_MODEL_65X
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select CPU_INTEL_MODEL_67X
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select CPU_INTEL_MODEL_68X
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@ -19,6 +14,8 @@ config SLOT_SPECIFIC_OPTIONS
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select SETUP_XIP_CACHE
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select RESERVE_MTRRS_FOR_OS
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if CPU_INTEL_SLOT_1
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config DCACHE_RAM_BASE
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hex
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default 0xfefc0000
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@ -1,13 +1,10 @@
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config CPU_INTEL_SOCKET_441
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bool
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if CPU_INTEL_SOCKET_441
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config SOCKET_SPECIFIC_OPTIONS
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def_bool y
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select CPU_INTEL_MODEL_106CX
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select SETUP_XIP_CACHE
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if CPU_INTEL_SOCKET_441
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config DCACHE_RAM_BASE
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hex
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default 0xfefc0000
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@ -1,12 +1,9 @@
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config CPU_INTEL_SOCKET_BGA956
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bool
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select CPU_INTEL_MODEL_1067X
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if CPU_INTEL_SOCKET_BGA956
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config SOCKET_SPECIFIC_OPTIONS
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def_bool y
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select CPU_INTEL_MODEL_1067X
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config DCACHE_RAM_BASE
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hex
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default 0xfefc0000
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@ -1,15 +1,12 @@
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config CPU_INTEL_SOCKET_FCBGA559
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bool
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select CPU_INTEL_MODEL_106CX
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select CPU_HAS_L2_ENABLE_MSR
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help
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Select this socket on Intel Pineview
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if CPU_INTEL_SOCKET_FCBGA559
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config SOCKET_SPECIFIC_OPTIONS
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def_bool y
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select CPU_INTEL_MODEL_106CX
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select CPU_HAS_L2_ENABLE_MSR
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config DCACHE_RAM_BASE
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hex
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default 0xfefc0000
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@ -1,16 +1,13 @@
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config CPU_INTEL_SOCKET_LGA775
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bool
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if CPU_INTEL_SOCKET_LGA775
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config SOCKET_SPECIFIC_OPTIONS
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def_bool y
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select CPU_INTEL_MODEL_6FX
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select CPU_INTEL_MODEL_F3X
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select CPU_INTEL_MODEL_F4X
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select CPU_INTEL_MODEL_1067X
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select SIPI_VECTOR_IN_ROM
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if CPU_INTEL_SOCKET_LGA775
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config DCACHE_RAM_SIZE
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hex
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default 0x8000 # 32 kB
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@ -1,13 +1,10 @@
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config CPU_INTEL_SOCKET_M
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bool
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if CPU_INTEL_SOCKET_M
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config SOCKET_SPECIFIC_OPTIONS
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def_bool y
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select CPU_INTEL_MODEL_6EX
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select CPU_INTEL_MODEL_6FX
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if CPU_INTEL_SOCKET_M
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config DCACHE_RAM_BASE
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hex
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default 0xfefc0000
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@ -1,10 +1,5 @@
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config CPU_INTEL_SOCKET_MPGA604
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bool
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if CPU_INTEL_SOCKET_MPGA604
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config SOCKET_SPECIFIC_OPTIONS
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def_bool y
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select CPU_INTEL_MODEL_F2X
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select UDELAY_TSC
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select TSC_MONOTONIC_TIMER
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@ -12,6 +7,8 @@ config SOCKET_SPECIFIC_OPTIONS
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select CPU_INTEL_COMMON
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select CPU_INTEL_COMMON_TIMEBASE
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if CPU_INTEL_SOCKET_MPGA604
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config DCACHE_RAM_BASE
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hex
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default 0xfefc0000
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@ -1,13 +1,10 @@
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config CPU_INTEL_SOCKET_P
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bool
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if CPU_INTEL_SOCKET_P
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config SOCKET_SPECIFIC_OPTIONS
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def_bool y
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select CPU_INTEL_MODEL_1067X
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select CPU_INTEL_MODEL_6FX
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if CPU_INTEL_SOCKET_P
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config DCACHE_RAM_BASE
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hex
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default 0xfefc0000
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