Split out microcode updates.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2095 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Ronald G. Minnich
parent
ebc692873d
commit
872141a402
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@ -14,3 +14,4 @@ dir /cpu/amd/dualcore
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dir /cpu/amd/microcode
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driver model_fxx_init.o
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object apic_timer.o
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object model_fxx_update_microcode.o
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@ -4,48 +4,10 @@
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* 2004.12 yhlu add dual core support
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* 2005.02 yhlu add e0 memory hole support
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*/
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/*============================================================================
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Copyright 2005 ADVANCED MICRO DEVICES, INC. All Rights Reserved.
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This software and any related documentation (the "Materials") are the
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confidential proprietary information of AMD. Unless otherwise provided in a
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software agreement specifically licensing the Materials, the Materials are
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provided in confidence and may not be distributed, modified, or reproduced in
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whole or in part by any means.
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LIMITATION OF LIABILITY: THE MATERIALS ARE PROVIDED "AS IS" WITHOUT ANY
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EXPRESS OR IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO
|
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WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT, TITLE, FITNESS FOR ANY
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PARTICULAR PURPOSE, OR WARRANTIES ARISING FROM CONDUCT, COURSE OF DEALING, OR
|
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USAGE OF TRADE. IN NO EVENT SHALL AMD OR ITS LICENSORS BE LIABLE FOR ANY
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DAMAGES WHATSOEVER (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS,
|
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BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OF OR
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INABILITY TO USE THE MATERIALS, EVEN IF AMD HAS BEEN ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGES. BECAUSE SOME JURISDICTIONS PROHIBIT THE EXCLUSION
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OR LIMITATION OF LIABILITY FOR CONSEQUENTIAL OR INCIDENTAL DAMAGES, THE ABOVE
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LIMITATION MAY NOT APPLY TO YOU.
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AMD does not assume any responsibility for any errors which may appear in the
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Materials nor any responsibility to support or update the Materials. AMD
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retains the right to modify the Materials at any time, without notice, and is
|
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not obligated to provide such modified Materials to you.
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NO SUPPORT OBLIGATION: AMD is not obligated to furnish, support, or make any
|
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further information, software, technical information, know-how, or show-how
|
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available to you.
|
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U.S. GOVERNMENT RESTRICTED RIGHTS: The Materials are provided with "RESTRICTED
|
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RIGHTS." Use, duplication, or disclosure by the Government is subject to the
|
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restrictions as set forth in FAR 52.227-14 and DFAR 252.227-7013, et seq., or
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its successor. Use of the Materials by the Government constitutes
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acknowledgement of AMD's proprietary rights in them.
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============================================================================*/
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//@DOC
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// in model_fxx_init.c
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/*
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$1.0$
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*/
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// Description: microcode patch support for k8
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// by yhlu
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//
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//============================================================================
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* Copyright 2005 AMD
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* 2005.08 yhlu add microcode support
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*/
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#include <console/console.h>
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#include <cpu/x86/msr.h>
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#include <cpu/amd/mtrr.h>
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@ -66,18 +28,6 @@ $1.0$
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#include <cpu/x86/mem.h>
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#include <cpu/amd/dualcore.h>
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static uint8_t microcode_updates[] __attribute__ ((aligned(16))) = {
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#include "microcode_rev_c.h"
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#include "microcode_rev_d.h"
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#include "microcode_rev_e.h"
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/* Dummy terminator */
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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};
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#include "model_fxx_msr.h"
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#define MCI_STATUS 0x401
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@ -420,46 +370,7 @@ static inline void k8_errata(void)
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}
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static unsigned id_mapping_table[] = {
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0x0f48, 0x0048,
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0x0f58, 0x0048,
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0x0f4a, 0x004a,
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0x0f5a, 0x004a,
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0x0f7a, 0x004a,
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0x0f82, 0x004a,
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0x0fc0, 0x004a,
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0x0ff0, 0x004a,
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0x10f50, 0x0150,
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0x10f70, 0x0150,
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0x10f80, 0x0150,
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0x10fc0, 0x0150,
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0x10ff0, 0x0150,
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0x20f10, 0x0210,
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0x20f12, 0x0210,
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0x20f32, 0x0210,
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0x20fb1, 0x0210,
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};
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static unsigned get_equivalent_processor_rev_id(unsigned orig_id) {
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unsigned new_id;
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int i;
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new_id = 0;
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for(i=0; i<sizeof(id_mapping_table); i+=2 ) {
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if(id_mapping_table[i]==orig_id) {
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new_id = id_mapping_table[i+1];
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break;
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}
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}
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return new_id;
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}
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extern void model_fxx_update_microcode(unsigned cpu_deviceid);
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void model_fxx_init(device_t cpu)
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{
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@ -474,9 +385,7 @@ void model_fxx_init(device_t cpu)
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x86_mtrr_check();
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/* Update the microcode */
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equivalent_processor_rev_id = get_equivalent_processor_rev_id(cpu->device );
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if(equivalent_processor_rev_id != 0)
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amd_update_microcode(microcode_updates, equivalent_processor_rev_id);
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model_fxx_update_microcode(cpu->device);
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disable_cache();
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@ -0,0 +1,129 @@
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/* Copyright 2005 AMD
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* 2005.08 yhlu add microcode support
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*/
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/*============================================================================
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Copyright 2005 ADVANCED MICRO DEVICES, INC. All Rights Reserved.
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This software and any related documentation (the "Materials") are the
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confidential proprietary information of AMD. Unless otherwise provided in a
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software agreement specifically licensing the Materials, the Materials are
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provided in confidence and may not be distributed, modified, or reproduced in
|
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whole or in part by any means.
|
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LIMITATION OF LIABILITY: THE MATERIALS ARE PROVIDED "AS IS" WITHOUT ANY
|
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EXPRESS OR IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO
|
||||
WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT, TITLE, FITNESS FOR ANY
|
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PARTICULAR PURPOSE, OR WARRANTIES ARISING FROM CONDUCT, COURSE OF DEALING, OR
|
||||
USAGE OF TRADE. IN NO EVENT SHALL AMD OR ITS LICENSORS BE LIABLE FOR ANY
|
||||
DAMAGES WHATSOEVER (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS,
|
||||
BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OF OR
|
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INABILITY TO USE THE MATERIALS, EVEN IF AMD HAS BEEN ADVISED OF THE
|
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POSSIBILITY OF SUCH DAMAGES. BECAUSE SOME JURISDICTIONS PROHIBIT THE EXCLUSION
|
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OR LIMITATION OF LIABILITY FOR CONSEQUENTIAL OR INCIDENTAL DAMAGES, THE ABOVE
|
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LIMITATION MAY NOT APPLY TO YOU.
|
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AMD does not assume any responsibility for any errors which may appear in the
|
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Materials nor any responsibility to support or update the Materials. AMD
|
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retains the right to modify the Materials at any time, without notice, and is
|
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not obligated to provide such modified Materials to you.
|
||||
NO SUPPORT OBLIGATION: AMD is not obligated to furnish, support, or make any
|
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further information, software, technical information, know-how, or show-how
|
||||
available to you.
|
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U.S. GOVERNMENT RESTRICTED RIGHTS: The Materials are provided with "RESTRICTED
|
||||
RIGHTS." Use, duplication, or disclosure by the Government is subject to the
|
||||
restrictions as set forth in FAR 52.227-14 and DFAR 252.227-7013, et seq., or
|
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its successor. Use of the Materials by the Government constitutes
|
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acknowledgement of AMD's proprietary rights in them.
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============================================================================*/
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//@DOC
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// in model_fxx_update_microcode.c
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/*
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$1.0$
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*/
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// Description: microcode patch support for k8
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// by yhlu
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//
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//============================================================================
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <string.h>
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#include <cpu/amd/microcode.h>
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static uint8_t microcode_updates[] __attribute__ ((aligned(16))) = {
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#if K8_REV_F_SUPPORT == 0
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#include "microcode_rev_c.h"
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#include "microcode_rev_d.h"
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#include "microcode_rev_e.h"
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#endif
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#if K8_REV_F_SUPPORT == 1
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// #include "microcode_rev_f.h"
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#endif
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/* Dummy terminator */
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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};
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static unsigned get_equivalent_processor_rev_id(unsigned orig_id) {
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static unsigned id_mapping_table[] = {
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#if K8_REV_F_SUPPORT == 0
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0x0f48, 0x0048,
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0x0f58, 0x0048,
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0x0f4a, 0x004a,
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0x0f5a, 0x004a,
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0x0f7a, 0x004a,
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0x0f82, 0x004a,
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0x0fc0, 0x004a,
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0x0ff0, 0x004a,
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0x10f50, 0x0150,
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0x10f70, 0x0150,
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0x10f80, 0x0150,
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0x10fc0, 0x0150,
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0x10ff0, 0x0150,
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0x20f10, 0x0210,
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0x20f12, 0x0210,
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0x20f32, 0x0210,
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0x20fb1, 0x0210,
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#endif
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#if K8_REV_F_SUPPORT == 1
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#endif
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};
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unsigned new_id;
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int i;
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new_id = 0;
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for(i=0; i<sizeof(id_mapping_table); i+=2 ) {
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if(id_mapping_table[i]==orig_id) {
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new_id = id_mapping_table[i+1];
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break;
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}
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}
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return new_id;
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}
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void model_fxx_update_microcode(unsigned cpu_deviceid)
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{
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unsigned equivalent_processor_rev_id;
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/* Update the microcode */
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equivalent_processor_rev_id = get_equivalent_processor_rev_id(cpu_deviceid );
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if(equivalent_processor_rev_id != 0)
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amd_update_microcode(microcode_updates, equivalent_processor_rev_id);
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}
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