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bd82x6x: Use CMOS variable if available for power-on on power failure 

We used a hard coded value for some reason. Don't do that, but use CMOS
instead.

Modelled after http://review.coreboot.org/#/c/443 to get bd82x6x in
sync.

Change-Id: I36d715310157b9f9074f2a1c80710f85833020b4
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1324
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Stefan Reinauer 2012-06-28 12:22:28 -07:00 committed by Stefan Reinauer
parent 7dc2864be7
commit 8730bf8aad
1 changed files with 10 additions and 4 deletions
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14
src/southbridge/intel/bd82x6x/smihandler.c
View File

@ -29,6 +29,7 @@
#include <device/pci_def.h>
#include <cpu/x86/smm.h>
#include <elog.h>
#include <pc80/mc146818rtc.h>
#include "pch.h"
#include "nvs.h"
@ -324,11 +325,16 @@ static void southbridge_smi_sleep(unsigned int node, smm_state_save_area_t *stat
u8 reg8;
u32 reg32;
u8 slp_typ;
/* FIXME: the power state on boot should be read from
* CMOS or even better from GNVS. Right now it's hard
* coded at compile time.
*/
u8 s5pwr = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
// save and recover RTC port values
u8 tmp70, tmp72;
tmp70 = inb(0x70);
tmp72 = inb(0x72);
get_option(&s5pwr, "power_on_after_fail");
outb(tmp70, 0x70);
outb(tmp72, 0x72);
void (*mainboard_sleep)(u8 slp_typ) = mainboard_smi_sleep;
/* First, disable further SMIs */