pass ide base address to driver
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1342 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -39,7 +39,7 @@
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#define CONFIG_IDE_MAXDEVICE (CONFIG_IDE_MAXBUS*2)
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#endif
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uint32_t ide_bus_offset[CONFIG_IDE_MAXBUS];
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uint32_t ide_base[CONFIG_IDE_MAXBUS];
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static void
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w83c553_ide_init(struct device *dev)
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@ -50,7 +50,6 @@ w83c553_ide_init(struct device *dev)
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printk_info("Configure W83C553F IDE (Function 1)\n");
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#if 0
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/*
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* Enable native mode on IDE ports and set base address.
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*/
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@ -80,12 +79,12 @@ w83c553_ide_init(struct device *dev)
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reg32 = 0x00ff0000 | W83C553F_IDECSR_P1EN | W83C553F_IDECSR_P0EN;
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pci_write_config32(dev, W83C553F_IDECSR, reg32);
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ide_bus_offset[0] = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
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printk_debug("ide bus offset = 0x%x\n", ide_bus_offset[0]);
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ide_bus_offset[0] &= ~1;
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ide_base[0] = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
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printk_debug("ide bus offset = 0x%x\n", ide_base[0]);
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ide_base[0] &= ~1;
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#if CONFIG_IDE_MAXBUS > 1
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ide_bus_offset[1] = pci_read_config32(dev, PCI_BASE_ADDRESS_2);
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ide_bus_offset[1] &= ~1;
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ide_base[1] = pci_read_config32(dev, PCI_BASE_ADDRESS_2);
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ide_base[1] &= ~1;
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#endif
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/*
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@ -94,7 +93,6 @@ w83c553_ide_init(struct device *dev)
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reg16 = pci_read_config16(dev, PCI_COMMAND);
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reg16 |= PCI_COMMAND_MASTER | PCI_COMMAND_IO;
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pci_write_config16(dev, PCI_COMMAND, reg16);
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#endif
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printk_info("IDE configuration complete\n");
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}
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