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sc7180: Update video mode active horizontal/vertical/total calculations 

Remove vbp & hbp as the names are misleading and use edid variables
to simplify the video mode active and total calculations.

Change-Id: I9ccafabe226fa53c6f82e32413d4c00a0b4531be
Signed-off-by: Vinod Polimera <vpolimer@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58144
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
Vinod Polimera 2021-09-29 10:23:28 +05:30 committed by Shelley Chen
parent ec58c01372
commit 878d3723fb
1 changed files with 6 additions and 13 deletions
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19
src/soc/qualcomm/sc7180/display/dsi.c
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@ -100,7 +100,6 @@ void mdss_dsi_video_mode_config(struct edid *edid, uint32_t bpp)
{ {
uint16_t dst_format; uint16_t dst_format;
uint8_t lane_en = 15; /* Enable 4 lanes by default */ uint8_t lane_en = 15; /* Enable 4 lanes by default */
uint16_t hfp, hbp, vfp, vbp;
switch (bpp) { switch (bpp) {
case 16: case 16:
@ -115,23 +114,17 @@ void mdss_dsi_video_mode_config(struct edid *edid, uint32_t bpp)
break; break;
} }
hfp = edid->mode.hso;
hbp = edid->mode.hbl - edid->mode.hso;
vfp = edid->mode.vso;
vbp = edid->mode.vbl - edid->mode.vso;
write32(&dsi0->video_mode_active_h, write32(&dsi0->video_mode_active_h,
((edid->mode.ha + hbp) << 16) | ((edid->mode.ha + edid->mode.hbl - edid->mode.hso) << 16) |
hbp); (edid->mode.hbl - edid->mode.hso));
write32(&dsi0->video_mode_active_v, write32(&dsi0->video_mode_active_v,
((edid->mode.va + vbp) << 16) | (vbp)); ((edid->mode.va + edid->mode.vbl - edid->mode.vso) << 16) |
(edid->mode.vbl - edid->mode.vso));
write32(&dsi0->video_mode_active_total, write32(&dsi0->video_mode_active_total,
((edid->mode.va + vfp + ((edid->mode.va + edid->mode.vbl - 1) << 16) |
vbp - 1) << 16) | (edid->mode.ha + edid->mode.hbl - 1));
(edid->mode.ha + hfp +
hbp - 1));
write32(&dsi0->video_mode_active_hsync, (edid->mode.hspw << 16)); write32(&dsi0->video_mode_active_hsync, (edid->mode.hspw << 16));
write32(&dsi0->video_mode_active_vsync, 0x0); write32(&dsi0->video_mode_active_vsync, 0x0);