arm64/a57: Move cortex_a57.h under include directory

BUG=chrome-os-partner:41877
BRANCH=None
TEST=Compiles successfully

Change-Id: I8a94176a3faacb25ae5e9eaeaac4011ddf5af6a1
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 802cba6f28a4e683256e8ce9fb6395acecdc9397
Original-Change-Id: I3a5983d4a40466bc0aa8ab3bd8430ab6cdd093cc
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/284868
Original-Reviewed-by: Yen Lin <yelin@nvidia.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/10898
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Furquan Shaikh 2015-07-10 15:27:02 -07:00 committed by Patrick Georgi
parent 6df355da87
commit 8799fde760
2 changed files with 4 additions and 1 deletions

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@ -19,7 +19,7 @@
#include <arch/asm.h>
#include <arch/cache_helpers.h>
#include "cortex_a57.h"
#include <cpu/cortex_a57.h>
ENTRY(arm64_cpu_early_setup)
mrs x0, CPUECTLR_EL1

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@ -20,6 +20,9 @@
#ifndef __ARCH_ARM64_CORTEX_A57_H__
#define __ARCH_ARM64_CORTEX_A57_H__
#define CPUACTLR_EL1 s3_1_c15_c2_0
#define BTB_INVALIDATE (1 << 0)
#define CPUECTLR_EL1 S3_1_c15_c2_1
#define SMPEN_SHIFT 6