sc7180: Enable bootblock compression

This patch enables bootblock compression on SC7180. In my tests, that
makes it boot roughly 10ms faster (which isn't much, but... might as
well take it).

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Ibbe06eeb05347cc77395681969e6eaf1598b4260
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45855
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Julius Werner 2020-09-29 19:23:36 -07:00
parent 6b8305d240
commit 87feced195
6 changed files with 16 additions and 3 deletions

View File

@ -31,6 +31,7 @@ bootblock-y += id.S
$(call src-to-obj,decompressor,$(dir)/id.S): $(obj)/build.h
$(call src-to-obj,bootblock,$(dir)/id.S): $(obj)/build.h
decompressor-$(CONFIG_ARM64_USE_ARCH_TIMER) += arch_timer.c
bootblock-$(CONFIG_ARM64_USE_ARCH_TIMER) += arch_timer.c
bootblock-y += transition.c transition_asm.S

View File

@ -18,6 +18,7 @@ config SOC_QUALCOMM_SC7180
select MAINBOARD_FORCE_NATIVE_VGA_INIT
select HAVE_LINEAR_FRAMEBUFFER
select CACHE_MRC_SETTINGS
select COMPRESS_BOOTBLOCK
if SOC_QUALCOMM_SC7180

View File

@ -1,6 +1,10 @@
ifeq ($(CONFIG_SOC_QUALCOMM_SC7180),y)
decompressor-y += decompressor.c
decompressor-y += mmu.c
decompressor-y += timer.c
################################################################################
bootblock-y += bootblock.c
bootblock-y += mmu.c

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@ -2,13 +2,11 @@
#include <bootblock_common.h>
#include <soc/clock.h>
#include <soc/mmu.h>
#include <soc/qspi.h>
#include <soc/qupv3_config.h>
void bootblock_soc_init(void)
{
sc7180_mmu_init();
clock_init();
quadspi_init(37500 * KHz);
qupv3_fw_init();

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@ -0,0 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bootblock_common.h>
#include <soc/mmu.h>
void decompressor_soc_init(void)
{
sc7180_mmu_init();
}

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@ -22,7 +22,7 @@ SECTIONS
AOPSRAM_END(0x0B100000)
SSRAM_START(0x14680000)
OVERLAP_VERSTAGE_ROMSTAGE(0x14680000, 100K)
OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0x14680000, 100K)
REGION(qcsdi, 0x14699000, 52K, 4K)
SSRAM_END(0x146AE000)