diff --git a/src/cpu/x86/smm/smihandler.c b/src/cpu/x86/smm/smihandler.c
index 7d6dfe4100..bb58140c67 100644
--- a/src/cpu/x86/smm/smihandler.c
+++ b/src/cpu/x86/smm/smihandler.c
@@ -118,6 +118,7 @@ void smi_handler(u32 smm_revision)
 	printk_spew("\nSMI# #%d\n", node);
 
 	switch (smm_revision) {
+	case 0x00030002:
 	case 0x00030007:
 		state_save.type = LEGACY;
 		state_save.legacy_state_save = (legacy_smm_state_save_area_t *)
@@ -145,8 +146,12 @@ void smi_handler(u32 smm_revision)
 	/* Call chipset specific SMI handlers. This would be the place to
 	 * add a CPU or northbridge specific SMI handler, too
 	 */
-
-	southbridge_smi_handler(node, &state_save);
+	if (cpu_smi_handler)
+		cpu_smi_handler(node, &state_save);
+	if (northbridge_smi_handler)
+		northbridge_smi_handler(node, &state_save);
+	if (southbridge_smi_handler)
+		southbridge_smi_handler(node, &state_save);
 
 	smi_release_lock();
 
diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h
index 6baefcb2f7..a014ee0e55 100644
--- a/src/include/cpu/x86/smm.h
+++ b/src/include/cpu/x86/smm.h
@@ -254,5 +254,7 @@ void io_trap_handler(int smif);
 int southbridge_io_trap_handler(int smif);
 int mainboard_io_trap_handler(int smif);
 
-void southbridge_smi_handler(unsigned int node, smm_state_save_area_t *state_save);
+void __attribute__((weak)) cpu_smi_handler(unsigned int node, smm_state_save_area_t *state_save);
+void __attribute__((weak)) northbridge_smi_handler(unsigned int node, smm_state_save_area_t *state_save);
+void __attribute__((weak)) southbridge_smi_handler(unsigned int node, smm_state_save_area_t *state_save);