GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/amd/stoneyridge: Use newer function for resource declarations 

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I2d01424731b149daa3d3378d66855ee5e074473b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76290
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Arthur Heymans 2023-07-05 12:11:12 +02:00 committed by Felix Held
parent dd9481542f
commit 885efa1102
1 changed files with 7 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
src/soc/amd/stoneyridge/northbridge.c
View File

@ -363,24 +363,22 @@ void domain_read_resources(struct device *dev)
fixed_io_range_reserved(dev, idx++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT); fixed_io_range_reserved(dev, idx++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT);
/* 0x0 -> 0x9ffff */ /* 0x0 -> 0x9ffff */
ram_resource_kb(dev, idx++, 0, 0xa0000 / KiB); ram_range(dev, idx++, 0, 0xa0000);
/* 0xa0000 -> 0xbffff: legacy VGA */ /* 0xa0000 -> 0xbffff: legacy VGA */
mmio_resource_kb(dev, idx++, VGA_MMIO_BASE / KiB, VGA_MMIO_SIZE / KiB); mmio_range(dev, idx++, VGA_MMIO_BASE, VGA_MMIO_SIZE);
/* 0xc0000 -> 0xfffff: Option ROM */ /* 0xc0000 -> 0xfffff: Option ROM */
reserved_ram_resource_kb(dev, idx++, 0xc0000 / KiB, 0x40000 / KiB); reserved_ram_from_to(dev, idx++, 0xc0000, 1 * MiB);
/* /*
* 0x100000 (1MiB) -> low top usable RAM * 0x100000 (1MiB) -> low top usable RAM
* cbmem_top() accounts for low UMA and TSEG if they are used. * cbmem_top() accounts for low UMA and TSEG if they are used.
*/ */
ram_resource_kb(dev, idx++, (1 * MiB) / KiB, ram_from_to(dev, idx++, 1 * MiB, mem_useable);
(mem_useable - (1 * MiB)) / KiB);
/* Low top usable RAM -> Low top RAM (bottom pci mmio hole) */ /* Low top usable RAM -> Low top RAM (bottom pci mmio hole) */
reserved_ram_resource_kb(dev, idx++, mem_useable / KiB, reserved_ram_from_to(dev, idx++, mem_useable, tom);
(tom - mem_useable) / KiB);
/* If there is memory above 4GiB */ /* If there is memory above 4GiB */
if (high_tom >> 32) { if (high_tom >> 32) {
@ -390,13 +388,11 @@ void domain_read_resources(struct device *dev)
else else
high_mem_useable = high_tom; high_mem_useable = high_tom;
ram_resource_kb(dev, idx++, (4ull * GiB) / KiB, ram_from_to(dev, idx++, 4ull * GiB, high_mem_useable);
((high_mem_useable - (4ull * GiB)) / KiB));
/* High top usable RAM -> high top RAM */ /* High top usable RAM -> high top RAM */
if (uma_base >= (4ull * GiB)) { if (uma_base >= (4ull * GiB)) {
reserved_ram_resource_kb(dev, idx++, uma_base / KiB, reserved_ram_range(dev, idx++, uma_base, uma_size);
uma_size / KiB);
} }
} }
} }