soc/amd/cezanne: include LAPIC code and set MAX_CPUS to 16
Change-Id: I97c73324900a0677165afa3f5b182a336d534968 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49730 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
This commit is contained in:
parent
eb723f01af
commit
88615629c0
|
@ -108,6 +108,10 @@ config MMCONF_BUS_NUMBER
|
|||
int
|
||||
default 64
|
||||
|
||||
config MAX_CPUS
|
||||
int
|
||||
default 16
|
||||
|
||||
config CONSOLE_UART_BASE_ADDRESS
|
||||
depends on CONSOLE_SERIAL && AMD_SOC_CONSOLE_UART
|
||||
hex
|
||||
|
|
|
@ -2,6 +2,7 @@
|
|||
|
||||
ifeq ($(CONFIG_SOC_AMD_CEZANNE),y)
|
||||
|
||||
subdirs-y += ../../../cpu/x86/lapic
|
||||
subdirs-y += ../../../cpu/x86/mtrr
|
||||
|
||||
# Beware that all-y also adds the compilation unit to verstage on PSP
|
||||
|
|
Loading…
Reference in New Issue