soc/intel/common/fast_spi: Add custom boot media device
This change enables support for a custom boot media device in fast SPI controller driver if the platform supports additional decode window for mapping BIOS regions greater than 16MiB. Following new Kconfigs are added: 1. FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW: SoC can select this to indicate support for extended BIOS window. 2. EXT_BIOS_WIN_BASE: If FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW is selected, this provides the base address of the host space that is reserved for mapping the extended window. 3. EXT_BIOS_WIN_SIZE: If FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW is selected, this provides the size of the host space reserved for mapping extended window. If platform indicates support for extended BIOS decode window, cbfstool add command is provided additional parameters for the decode window using --ext-win-base and --ext-win-size. It is the responsibility of the mainboard fmap author to ensure that the sections in the BIOS region do not cross 16MiB boundary as the host space windows are not contiguous. This change adds a build time check to ensure no sections in FMAP cross the 16MiB boundary. Even though the platform supports extended window, it depends upon the size of BIOS region (which in turn depends on SPI flash size) whether and how much of the additional window is utilized at runtime. This change also provides helper functions for rest of the coreboot components to query how much of the extended window is actually utilized. BUG=b:171534504 Change-Id: I1b564aed9809cf14b40a3b8e907622266fc782e2 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47659 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Furquan Shaikh
parent
b652aaef99
commit
886f4e862a
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@ -11,3 +11,48 @@ config FAST_SPI_DISABLE_WRITE_STATUS
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default y
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default y
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help
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help
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Disable the write status SPI opcode in Intel Fast SPI block.
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Disable the write status SPI opcode in Intel Fast SPI block.
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config FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW
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bool
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depends on SOC_INTEL_COMMON_BLOCK_FAST_SPI
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help
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Fast SPI controller on the platform supports additional
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window for memory mapping BIOS region (region 1) on the SPI
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flash beyond the standard limit of 16MiB. Depending upon the
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size of the SPI flash part used by the mainboard, two decode
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windows will be enabled:
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1. Fixed decode window up to a maximum size of 16MiB under
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4G boundary.
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2. Extended decode window up to a maximum size provided by
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the platform to map the rest of the BIOS region.
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SoC selecting this config is expected to provide the base and
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maximum size of the extended window in the host address space
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using configs EXT_BIOS_WIN_BASE and EXT_BIOS_WIN_SIZE.
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config EXT_BIOS_WIN_BASE
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hex
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help
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If an additional window for mapping BIOS region greater than
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16MiB is supported, then this config is used to provide the
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base address reserved for the mapping. Since the mapping is
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done at the top of the window, depending upon the size of the
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BIOS region, the actual base address configured in the fast
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SPI controller can be higher at runtime.
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config EXT_BIOS_WIN_SIZE
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hex
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help
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Maximum size of the extended window reserved for mapping BIOS
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region greater than 16MiB. The actual mapped window might be
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smaller depending upon the size of the BIOS region.
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if FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW
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# Disable X86_TOP4G_BOOTMEDIA_MAP because the fast SPI controller
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# driver provides a custom boot media device when multiple decode
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# windows are used for the BIOS region.
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config X86_TOP4G_BOOTMEDIA_MAP
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default n
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endif
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@ -19,3 +19,35 @@ smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi_flash.c
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endif
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endif
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CPPFLAGS_common += -I$(src)/soc/intel/common/block/fast_spi
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CPPFLAGS_common += -I$(src)/soc/intel/common/block/fast_spi
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ifeq ($(CONFIG_FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW),y)
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# mmap_boot.c provides a custom boot media device for the platforms that support
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# additional window for BIOS regions greater than 16MiB. This is used instead of
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# the default boot media device in arch/x86/mmap_boot.c
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bootblock-y += mmap_boot.c
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verstage-y += mmap_boot.c
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romstage-y += mmap_boot.c
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postcar-y += mmap_boot.c
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ramstage-y += mmap_boot.c
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smm-y += mmap_boot.c
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# Check to ensure that no sections in the FMAP cross 16MiB boundary if
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# the platform supports split decode windows for BIOS region greater
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# than 16MiB.
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check-fmap-16mib-crossing: $(obj)/fmap_config.h
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flash_offset=$$(printf "%d" $$(cat $(obj)/fmap_config.h | grep "FMAP_SECTION_FLASH_START" | awk '{print $$NF}')); \
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for x in $$(cat $(obj)/fmap_config.h | grep "FMAP_TERMINAL_SECTIONS" | cut -d\" -f2); do \
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start=$$(printf "%d" $$(cat $(obj)/fmap_config.h | grep "FMAP_SECTION_"$$x"_START" | awk '{print $$NF}')); \
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size=$$(printf "%d" $$(cat $(obj)/fmap_config.h | grep "FMAP_SECTION_"$$x"_SIZE" | awk '{print $$NF}')); \
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start=$$((start-flash_offset)); \
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end=$$((start+size-1)); \
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if [ $$start -lt 16777216 ] && [ $$end -ge 16777216 ]; then echo "ERROR:" $$x "crosses 16MiB boundary"; fail=1; break; fi; \
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done; \
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if [ $$fail -eq 1 ]; then false; fi
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INTERMEDIATE+=check-fmap-16mib-crossing
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CBFSTOOL_ADD_CMD_OPTIONS += --ext-win-base $(CONFIG_EXT_BIOS_WIN_BASE) --ext-win-size $(CONFIG_EXT_BIOS_WIN_SIZE)
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endif # CONFIG_FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW
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@ -0,0 +1,162 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* This file provides a custom boot media device for the platforms that support additional
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* window for BIOS regions greater than 16MiB. If the mainboard uses a smaller BIOS region, then
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* the additional window is unused.
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*/
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#include <boot_device.h>
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#include <commonlib/region.h>
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#include <console/console.h>
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#include <fmap.h>
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#include <intelblocks/fast_spi.h>
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enum window_type {
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/* Fixed decode window of max 16MiB size just below 4G boundary */
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FIXED_DECODE_WINDOW,
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/* Additional decode window for mapping BIOS region greater than 16MiB */
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EXT_BIOS_DECODE_WINDOW,
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TOTAL_DECODE_WINDOWS,
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};
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static struct xlate_region_device real_dev;
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static struct mem_region_device shadow_devs[TOTAL_DECODE_WINDOWS];
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static struct xlate_window real_dev_windows[TOTAL_DECODE_WINDOWS];
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static void initialize_window(enum window_type type, uintptr_t host_base,
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uintptr_t flash_base, size_t size)
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{
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mem_region_device_ro_init(&shadow_devs[type], (void *)host_base, size);
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xlate_window_init(&real_dev_windows[type], &shadow_devs[type].rdev,
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flash_base, size);
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printk(BIOS_INFO, "MMAP window: SPI flash base=0x%lx, Host base=0x%lx, Size=0x%zx\n",
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flash_base, host_base, size);
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}
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/*
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*
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* +--------------+
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* | |
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* | |
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* | |
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* ^ +------------+--------------------------^--------------------------------+ 0xffffffff
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* | | | | | |
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* | | | | | |
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* | | | + | FIXED |
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* | | | fixed_win_size | DECODE |
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* | | BIOS | + | WINDOW |
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* + | region | | | |
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* bios_size | (Region 1) | | | |
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* + | | | | |
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* | | | | | |
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* | | | fixed_win_flash_base+----v--------------------------------+ fixed_win_host_base
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* | | | | | |
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* | | | | | |
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* | | | | | Other MMIO |
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* v | | | | |
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* bios_start +------------+ ext_win_flash_base | | |
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* | | + | | |
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* | | | | | |
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* | | | | | |
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* | | | +-----^------------------------------------------------------------^
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* 0 +------------+ | | | | |
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* | + | EXT_BIOS | |
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* SPI flash | ext_win_size | DECODE | |
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* address | + | WINDOW | +
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* space | | | | CONFIG_EXT_BIOS_WIN_SIZE
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* +--------------v-------------------------------+ ext_win_host_base +
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* | | |
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* | Unused | |
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* | | |
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* +--------------+ CONFIG_EXT_BIOS_WIN_BASE+--v
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* | |
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* | |
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* | |
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* +--------------+
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*
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* Host address
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* space
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*/
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static void bios_mmap_init(void)
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{
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static bool init_done;
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size_t bios_size, bios_start;
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uintptr_t fixed_win_host_base, fixed_win_flash_base;
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uintptr_t ext_win_host_base, ext_win_flash_base;
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size_t fixed_win_size, ext_win_size;
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size_t win_count = 0;
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if (init_done)
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return;
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/* Read the offset and size of BIOS region in the SPI flash address space. */
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bios_start = fast_spi_get_bios_region(&bios_size);
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/*
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* By default, fixed decode window (maximum size 16MiB) is mapped just below the 4G
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* boundary. This window maps the top part of the BIOS region in the SPI flash address
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* space to the host address space.
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*/
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fixed_win_size = MIN(16 * MiB, bios_size);
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fixed_win_host_base = 4ULL * GiB - fixed_win_size;
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fixed_win_flash_base = bios_start + bios_size - fixed_win_size;
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initialize_window(FIXED_DECODE_WINDOW, fixed_win_host_base, fixed_win_flash_base,
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fixed_win_size);
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win_count++;
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_Static_assert(CONFIG_EXT_BIOS_WIN_BASE != 0, "Extended BIOS window base cannot be 0!");
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_Static_assert(CONFIG_EXT_BIOS_WIN_SIZE != 0, "Extended BIOS window size cannot be 0!");
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/*
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* Remaining portion of the BIOS region up to a maximum of CONFIG_EXT_BIOS_WIN_SIZE is
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* mapped at the top of the extended window if the BIOS region is greater than 16MiB.
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*
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* If the BIOS region is not greater than 16MiB, then the extended window is not
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* enabled.
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*/
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ext_win_size = MIN(CONFIG_EXT_BIOS_WIN_SIZE, bios_size - fixed_win_size);
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if (ext_win_size) {
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ext_win_host_base = CONFIG_EXT_BIOS_WIN_BASE + CONFIG_EXT_BIOS_WIN_SIZE -
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ext_win_size;
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ext_win_flash_base = fixed_win_flash_base - ext_win_size;
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initialize_window(EXT_BIOS_DECODE_WINDOW, ext_win_host_base,
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ext_win_flash_base, ext_win_size);
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win_count++;
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}
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xlate_region_device_ro_init(&real_dev, win_count, real_dev_windows, CONFIG_ROM_SIZE);
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init_done = true;
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}
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const struct region_device *boot_device_ro(void)
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{
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bios_mmap_init();
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return &real_dev.rdev;
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}
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void fast_spi_get_ext_bios_window(uintptr_t *base, size_t *size)
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{
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const struct region_device *rd = &shadow_devs[EXT_BIOS_DECODE_WINDOW].rdev;
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bios_mmap_init();
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*size = region_device_sz(rd);
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if (*size == 0) {
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*base = 0;
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} else {
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/*
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* This is a memory region device. So, mmap returns the base address of the
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* device. Also, as this is a memory region device, unmap is a no-op.
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*/
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*base = (uintptr_t)rdev_mmap_full(rd);
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}
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}
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@ -74,4 +74,11 @@ bool fast_spi_wpd_status(void);
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*/
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*/
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void fast_spi_enable_wp(void);
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void fast_spi_enable_wp(void);
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/*
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* Get base and size of extended BIOS decode window used at runtime in host address space. If
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* the BIOS region is not greater than 16MiB, then this function returns 0 for both base and
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* size.
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*/
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void fast_spi_get_ext_bios_window(uintptr_t *base, size_t *size);
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#endif /* SOC_INTEL_COMMON_BLOCK_FAST_SPI_H */
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#endif /* SOC_INTEL_COMMON_BLOCK_FAST_SPI_H */
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