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soc/intel/common: Drop unused `fast_spi_flash_read_wpsr` function 

Also remove one macro that was only used inside that function.

Change-Id: Id798e08375c5757aa99288ca4a7df923309f4d67
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50753
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
This commit is contained in:
Angel Pons 2021-02-15 17:22:19 +01:00
parent 5207243270
commit 887cf3017a
3 changed files with 0 additions and 31 deletions
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2
src/soc/intel/common/block/fast_spi/fast_spi_def.h
View File

@ -76,8 +76,6 @@
#define SPIBAR_HSFSTS_FDONE (1 << 0)
#define SPIBAR_HSFSTS_W1C_BITS (0xff)
#define WPSR_MASK_SRP0_BIT 0x80
/* Bit definitions for FADDR (0x08) register */
#define SPIBAR_FADDR_MASK 0x7FFFFFF

24
src/soc/intel/common/block/fast_spi/fast_spi_flash.c
View File

@ -302,30 +302,6 @@ static int fast_spi_flash_probe(const struct spi_slave *dev,
return 0;
}
/*
* Minimal set of commands to read WPSR from FAST_SPI.
* Returns 0 on success, < 0 on failure.
*/
int fast_spi_flash_read_wpsr(u8 *sr)
{
uint8_t rdsr;
int ret = 0;
fast_spi_init();
/* sending NULL for spiflash struct parameter since we are not
* calling HWSEQ read_status() call via Probe.
*/
ret = fast_spi_flash_status(NULL, &rdsr);
if (ret) {
printk(BIOS_ERR, "SPI rdsr failed\n");
return ret;
}
*sr = rdsr & WPSR_MASK_SRP0_BIT;
return 0;
}
static int fast_spi_flash_ctrlr_setup(const struct spi_slave *dev)
{
if (dev->cs != 0) {

5
src/soc/intel/common/block/include/intelblocks/fast_spi.h
View File

@ -9,11 +9,6 @@
* Disable the BIOS write protect and Enable Prefetching and Caching.
*/
void fast_spi_init(void);
/*
* Minimal set of commands to read WPSR from SPI.
* Returns 0 on success, < 0 on failure.
*/
int fast_spi_flash_read_wpsr(u8 *sr);
/*
* Set FAST_SPIBAR BIOS Control BILD bit.
*/