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kunimitsu: Select BOARD_ID_AUTO and clean up boardid code 

Select the BOARD_ID_AUTO kconfig option to have the coreboot
tables populated with the board ID and print it early in
romstage as well.  Also clean up the code for it.

BUG=chrome-os-partner:40635
BRANCH=none
TEST=emerge-kunimitsu coreboot

Change-Id: I90bd85ef14543717287cbeaaab77e6c54b94df97
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 1fed7de4a0650a497a240b091fd2eb99d59e1433
Original-Change-Id: I82e9d17ab618b1aae1fd874d9247b7d52b42334d
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/297750
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11574
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Duncan Laurie 2015-09-04 10:24:40 -07:00 committed by Patrick Georgi
parent 1a50d08fc7
commit 88b21f31e6
3 changed files with 8 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/mainboard/intel/kunimitsu/Kconfig
View File

@ -2,6 +2,7 @@ if BOARD_INTEL_KUNIMITSU
config BOARD_SPECIFIC_OPTIONS # dummy config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y def_bool y
select BOARD_ID_AUTO
select BOARD_ROMSIZE_KB_16384 select BOARD_ROMSIZE_KB_16384
select CACHE_ROM select CACHE_ROM
select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC

7
src/mainboard/intel/kunimitsu/Makefile.inc
View File

@ -20,14 +20,17 @@
subdirs-y += spd subdirs-y += spd
romstage-y += boardid.c
romstage-y += pei_data.c romstage-y += pei_data.c
romstage-$(CONFIG_CHROMEOS) += chromeos.c romstage-$(CONFIG_CHROMEOS) += chromeos.c
ramstage-$(CONFIG_CHROMEOS) += chromeos.c ramstage-$(CONFIG_CHROMEOS) += chromeos.c
ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC) += ec.c ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC) += ec.c
ramstage-y += boardid.c
ramstage-y += mainboard.c ramstage-y += mainboard.c
ramstage-y += pei_data.c ramstage-y += pei_data.c
ramstage-y += ramstage.c ramstage-y += ramstage.c
ramstage-y += boardid.c
romstage-y += boardid.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c

6
src/mainboard/intel/kunimitsu/boardid.c
View File

@ -1,8 +1,8 @@
/* /*
* This file is part of the coreboot project. * This file is part of the coreboot project.
* *
* Copyright(C) 2013 Google Inc. * Copyright (C) 2015 Google Inc.
* Copyright (C) 2015 Intel Corp. * Copyright (C) 2015 Intel Corporation
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@ -21,7 +21,6 @@
#include <boardid.h> #include <boardid.h>
#include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/ec.h>
uint8_t board_id(void) uint8_t board_id(void)
{ {
MAYBE_STATIC int id = -1; MAYBE_STATIC int id = -1;
@ -31,4 +30,3 @@ uint8_t board_id(void)
return id; return id;
} }