mb/amd/majolica,google/guybrush,google/mancomb: select HAVE_ACPI_RESUME

Since not all mainboards based on the Cezanne SoC have to support ACPI
resume, select this option in the mainboard's Kconfig and not in the
SoC's Kconfig.

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I988276ccb5b61837d7f3f015d1d1aba783324b02
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51305
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Raul E Rangel 2021-03-05 13:55:59 -07:00 committed by Martin Roth
parent c14bbc9c70
commit 88dbfa96e6
3 changed files with 3 additions and 0 deletions

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@ -5,6 +5,7 @@ if BOARD_AMD_MAJOLICA
config BOARD_SPECIFIC_OPTIONS config BOARD_SPECIFIC_OPTIONS
def_bool y def_bool y
select BOARD_ROMSIZE_KB_16384 select BOARD_ROMSIZE_KB_16384
select HAVE_ACPI_RESUME
select SOC_AMD_CEZANNE select SOC_AMD_CEZANNE
select SOC_AMD_COMMON_BLOCK_USE_ESPI select SOC_AMD_COMMON_BLOCK_USE_ESPI
select AMD_SOC_CONSOLE_UART select AMD_SOC_CONSOLE_UART

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@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
select ELOG select ELOG
select ELOG_GSMI select ELOG_GSMI
select FW_CONFIG select FW_CONFIG
select HAVE_ACPI_RESUME
select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_CHROMEOS
select SOC_AMD_CEZANNE select SOC_AMD_CEZANNE
select SOC_AMD_COMMON_BLOCK_USE_ESPI select SOC_AMD_COMMON_BLOCK_USE_ESPI

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@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS
def_bool y def_bool y
select AMD_SOC_CONSOLE_UART select AMD_SOC_CONSOLE_UART
select BOARD_ROMSIZE_KB_16384 select BOARD_ROMSIZE_KB_16384
select HAVE_ACPI_RESUME
select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_CHROMEOS
select SOC_AMD_CEZANNE select SOC_AMD_CEZANNE
select SOC_AMD_COMMON_BLOCK_USE_ESPI select SOC_AMD_COMMON_BLOCK_USE_ESPI